Burst Read Control Circuit for Flash Memory Page Mode
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Solution Overview
Problem
Flash memory devices do not support data burst read operations, which limits the performance of microcontrollers that rely on external memory access, as they cannot utilize the benefits of burst transfers.
Innovation Solution
A burst-read control circuit interfaces between a burst-read capable device and a page-mode memory device, utilizing the page buffer to emulate burst read operations without modifying the microcontroller or flash memory, by incrementing the page buffer address to retrieve contiguous data addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flash memory devices are used, then data storage capacity is provided, but burst read operations cannot be performed
Solution Approach 1:
The patent introduces a burst read control circuit as an intermediary component between the microcontroller and the flash memory device. This control circuit translates burst read requests from the microcontroller into sequential page mode read operations that the flash memory device can execute, thereby enabling burst read functionality without modifying the flash memory device itself.
2Reliability
If sequential read operations are used, then compatibility with flash memory is maintained, but data access time increases
Solution Approach 1:
The burst read control circuit performs preliminary actions by pre-fetching and buffering data pages into the control circuit's internal memory. When a burst read request is received, the control circuit can immediately serve subsequent pages from its buffer without waiting for the flash memory device to complete each sequential read operation, thereby reducing overall data access time.
3Ease of operation
If microcontroller executes multiple individual read operations, then software execution is possible, but performance is limited
Solution Approach 1:
The patent merges multiple individual read operations into a single burst read request from the microcontroller's perspective. The burst read control circuit handles the complexity of translating this single request into multiple coordinated page mode read operations, allowing the microcontroller to execute software more efficiently while maintaining ease of operation.
Data Source
AI summary
A burst read control circuit acts as an interface to allow a burst-read capable device to execute burst reads from a page-mode capable memory device. The burst read control circuit coordinates burst read requests from the burst-read capable device and subsequent responses from the page-mode capable memory device by accessing subsequent and contiguous memory locations of the page-mode capable memory device.