Burst-Sized Linked List Elements for Queue Buffering

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Solution Overview

Problem

Modern routers and switches face challenges in efficiently buffering large amounts of data during silent periods in communication protocols, requiring effective data storage solutions to maintain quality of service and support features like pause and record in video applications.

Innovation Solution

The implementation of a buffering system that uses burst-sized elements stored in a linked list, where descriptors are stored in off-chip memory, allowing for dynamic queue sizing and fast burst access, enabling efficient data retrieval and reconstruction of data streams without the need for pre-allocation of memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If descriptors are stored individually in a queue, then each descriptor can be accessed separately, but memory access efficiency deteriorates due to inability to perform burst transfers

Engineering Contradiction:
ImproveDescriptor access flexibilityVSAvoidMemory access throughput
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The queue is segmented into multiple descriptor groups, where each group contains a burst-sized number of descriptors (e.g., 64 descriptors per group). This segmentation allows the memory interface to transfer entire groups in single burst operations while maintaining the ability to access individual descriptors within each group through group base addresses and offsets.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If queue size is fixed and pre-allocated, then memory allocation is simple, but adaptability deteriorates when handling variable data volumes during silent periods

Engineering Contradiction:
ImproveMemory allocation simplicityVSAvoidQueue size adaptability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The queue structure uses dynamic memory allocation where descriptor groups can be allocated and deallocated based on actual data volume requirements. The queue head and tail pointers dynamically track the current state, allowing the queue to grow and shrink during silent periods without requiring fixed pre-allocation, thus adapting to variable data volumes while maintaining efficient burst access patterns.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If descriptors are stored in off-chip memory, then memory requirements are reduced, but access speed deteriorates compared to on-chip storage

Engineering Contradiction:
ImproveMemory capacityVSAvoidDescriptor retrieval speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

Multiple descriptors are merged into single memory storage locations organized as descriptor groups. Each group contains multiple descriptors that can be transferred together in a single burst operation, effectively combining multiple individual access operations into one unified memory transaction, thereby maintaining high throughput despite off-chip storage.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If burst-sized elements are used, then data throughput is improved through efficient memory transfers, but device complexity increases due to additional buffer management requirements

Engineering Contradiction:
ImproveData throughputVSAvoidBuffer management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The descriptor group structure serves multiple functions simultaneously: it enables efficient burst transfers, provides dynamic queue resizing capability, maintains individual descriptor accessibility, and simplifies memory management through unified group-based allocation. This multi-functionality reduces overall system complexity despite the enhanced capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20190065413A1Burst-sized linked list elements for a queue
Publication Date: 2019.02.28 MAXLINEAR INC
  • US20190065413A1 patent drawing
  • US20190065413A1 patent drawing
  • US20190065413A1 patent drawing

AI summary

Methods, apparatus, circuitry, and systems to construct a queue including a plurality of elements are provided. A method includes receiving metadata describing a first buffer; generating a descriptor based on the metadata; and storing the descriptor in an element. The element is configured to store a predetermined number of descriptors and the element includes an amount of memory corresponding to a burst size of a component configured to read the metadata to control access to the first buffer.