Burst-Mode SRAM Column Multiplexer Without Complement Address Toggling
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Solution Overview
Problem
Burst-mode SRAMs face inefficiencies due to the need for toggling multiple address signals and the requirement of delayed clock signals for data latching, which increases power consumption and reduces operating speed.
Innovation Solution
A column multiplexer that responds to decoded column addresses without needing complement addresses, coupled with an asynchronous output data latch, allowing for reduced power consumption and faster operation by eliminating the need for delayed clock signals during burst-mode read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complement decoded column address signals are used for column multiplexer control, then column selection accuracy is improved, but power consumption increases and device complexity increases
Solution Approach 1:
The patent extracts and eliminates the need for complement decoded column address signals from the conventional burst-mode SRAM architecture. By removing this redundant signal requirement, the invention reduces power consumption associated with toggling complement address signals while maintaining accurate column selection through the column multiplexer using only true decoded column address signals.
2Reliability
If delayed clock signals are used for output data latch, then data hold time requirement is satisfied, but operating speed decreases
Solution Approach 1:
The patent applies preliminary action by ensuring that the column multiplexer completes its column selection and data transfer to the output data latch before the clock edge arrives. This advance preparation eliminates the need for delayed clock signals, as the data is already ready at the latch input when the clock triggers the latching operation, thereby maintaining reliability without sacrificing operating speed.
3Measurement precision
If multiple address signals are toggled for column selection, then column address decoding accuracy is improved, but power consumption increases
Solution Approach 1:
The patent extracts and eliminates the toggling of complement address signals from the column selection process. By using a column multiplexer controlled solely by true decoded column address signals, the invention removes the energy-consuming toggling of complement signals while preserving accurate column address decoding through the multiplexer's selection logic.
Data Source
AI summary
A memory is provided that is configured to practice both a normal read operation and also a burst mode read operation. A column multiplexer selects from a plurality of columns using a pair of pass transistor for each column. The column multiplexer drives a true input node and a complement input node of an output data latch.