Burst Transimpedance Amplifier With Internal Reset Switching
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Solution Overview
Problem
In optical receivers, particularly in burst transimpedance amplifiers (BTIAs) used for PONs, managing response performance and consecutive identical code tolerance simultaneously is challenging due to the need for variable gain and offset voltage adjustments, which often results in code errors and requires external reset signals, leading to poor compatibility and increased power consumption.
Innovation Solution
A transimpedance amplifier circuit that generates a reset signal internally using a comparator to compare the collector voltage of a transistor with a reference voltage, allowing for dynamic adjustment of time constants to enhance response speed and code tolerance without external dependencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the time constant is made small to achieve high speed response, then response speed is improved, but consecutive identical code tolerance deteriorates
Solution Approach 1:
The patent applies dynamics by making the time constant adjustable rather than fixed. The time constant switching circuit changes the time constant value based on the reset signal: using a small time constant during burst periods for high-speed response, and a large time constant during no-signal periods to enhance consecutive identical code tolerance. This dynamic adjustment resolves the contradiction between response speed and code tolerance.
2Speed
If external reset signal circuits are added to manage response performance and code tolerance, then response performance is improved, but device complexity increases
Solution Approach 1:
The patent merges the reset signal generation function into the existing TIA circuit by utilizing the differential output buffer's common potential node. Instead of adding a separate external reset generation circuit, the invention combines the reset signal generation with the existing circuit components, thereby improving response performance while minimizing the increase in device complexity.
3Speed
If external reset signal wiring is implemented, then response control is improved, but ease of operation deteriorates
Solution Approach 1:
The patent applies self-service by enabling the TIA circuit to generate its own reset signal internally using the differential output buffer's common potential. This eliminates the need for external reset signal wiring from the MAC-LSI, allowing the receiver to autonomously control its response characteristics without requiring external intervention or dedicated wiring, thereby improving ease of operation and compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This internal reset signal generation enables high-speed response and improved consecutive identical code tolerance, reducing the need for external components and minimizing power consumption, thereby enhancing the versatility and compatibility of the BTIA.
Implementation Method 1
a comparator configured to compare a collector voltage of the transistor with a reference voltage and output a reset signal
Data Source
AI summary
A reset signal is generated by a TIA circuit alone. In an embodiment, a transimpedance amplifier configured to convert a current signal into a voltage signal includes a transimpedance stage including an amplification stage constituted of a transistor with a grounded emitter, and a comparator configured to compare a collector voltage of the transistor with a reference voltage and output a reset signal.