Bursty Phase Detector for Zero-Lock Data Stream Sampling
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Solution Overview
Problem
Bursty data systems face inefficiencies in phase detection due to long locking times and bandwidth usage, particularly when using preambles, and require costly high-speed dedicated circuitry for rapid phase detection.
Innovation Solution
A bursty phase detector design with an upper branch including a voltage-controlled oscillator, phase detector, sample selector, and signal stream detector, and a lower branch with a delay component, allowing for phase detection with 0 or negative locking time using standard electronics, eliminating the need for costly high-speed circuitry and reducing preamble length constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a preamble is appended to the data stream for phase detection, then phase detection accuracy is improved, but locking time increases and bandwidth efficiency deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing phase error values in a lookup table before data transmission. During operation, the system retrieves pre-computed phase error values based on received signal phases, eliminating the need for real-time complex phase detection calculations and long preambles, thus reducing locking time while maintaining accuracy
Solution Approach 2:
The patent creates a simplified copy of the phase detection process by using a lookup table that stores pre-computed phase error values. Instead of performing full phase detection calculations, the system copies the essential phase error information from the lookup table based on received phase values, achieving fast and accurate phase detection without long preambles
2Loss of time
If dedicated high-speed circuitry is used for phase detection, then locking time is reduced, but device cost increases
Solution Approach 1:
The patent replaces expensive high-speed dedicated circuitry with a cost-effective lookup table implemented in standard electronics. The lookup table stores pre-computed phase error values that can be quickly retrieved using standard processors or memory, achieving fast phase detection without requiring costly custom hardware
Solution Approach 2:
The patent substitutes the mechanical/electrical dedicated high-speed circuitry with a software-based lookup table approach. Instead of using specialized hardware circuits for phase detection, the system uses stored data tables and standard processing electronics, replacing complex hardware with simpler computational methods
3Measurement precision
If a long preamble is used for phase detection, then phase detection accuracy is improved, but bandwidth efficiency deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-computing and storing phase error values in a lookup table before data transmission. This allows the receiver to quickly determine phase errors using only a short preamble or even without a preamble, eliminating the need for long preambles and improving bandwidth efficiency while maintaining detection accuracy
Solution Approach 2:
The patent uses partial action by implementing a simplified phase detection mechanism that requires only partial phase information to function effectively. The lookup table provides sufficient phase error correction with minimal input data, allowing accurate phase detection with short or zero-length preambles, thus improving bandwidth utilization
Data Source
AI summary
A bursty phase detector comprises upper and lower branches. The upper branch includes a voltage-controlled oscillator (VCO) providing a VCO phase; a phase detector with a first input for receiving a data stream and a second input coupled to the output of the VCO, the phase detector providing a phase error; a sample selector with a first input for receiving a sum of the VCO phase and the phase error, and a second input coupled to receive the data stream, the sample selector providing a data stream sample; a signal stream detector with a first input for receiving the sum of the VCO phase and the phase error, and a second input coupled to the output of the sample selector, the signal stream detector generating a data stream phase and a data stream detect signal. The lower branch includes a delay component with an input for receiving the data stream.