Variable-Frequency Bus Adapter DFS Handshake Mechanism

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Solution Overview

Problem

Existing dynamic voltage frequency scaling (DVFS) technologies face challenges in ensuring normal operation of peripheral components during bus dynamic frequency scaling due to unsatisfied clock constraints, leading to increased complexity and limited applicability.

Innovation Solution

A variable-frequency bus adapter system that temporarily blocks bus transfers during DFS, generating a bus blocking indication and feeding back a DFS response signal to enable DFS operations without increasing the number of clock domains or modifying peripheral components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separated structure of clock domains is adopted to ensure normal operation of peripheral components during bus DFS, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvenormal operation of peripheral componentsVSAvoidnumber of clock domains
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A bus adapter is introduced as an intermediary component between the variable-frequency bus and peripheral components. The adapter receives DFS control signals, blocks bus transfers during frequency scaling, and coordinates the transition, thereby protecting peripheral components without requiring separate clock domains for each component.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If complex modifications are made to peripheral components to adapt them to variable-frequency bus, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improveadaptation to variable-frequency busVSAvoidmodification complexity of peripheral components
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The bus adapter serves as a mediator that handles all the complexity of DFS coordination. Peripheral components only need to interact with the adapter through standard interfaces, receiving protection signals during DFS without needing internal modifications. This maintains adaptability while minimizing changes to peripheral components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The bus adapter autonomously monitors bus frequency status, determines when DFS is occurring, and automatically blocks or unblocks bus transfers accordingly. This self-service capability eliminates the need for complex control logic in peripheral components, simplifying their design while maintaining adaptability.

Inventive Principle:
Principle #25Self-service

3Reliability

If bus transfer is blocked during DFS, then reliability is improved, but productivity decreases

Engineering Contradiction:
Improveprotection of peripheral componentsVSAvoidbus transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The bus adapter implements periodic blocking and unblocking of bus transfers synchronized with the DFS cycles. Bus transfers are blocked only during the brief periods when bus frequency is changing, and unblocked during stable frequency periods. This periodic action protects peripheral components during critical transitions while maximizing bus utilization during stable operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The bus adapter receives DFS control signals from the bus master, monitors the frequency scaling status, and provides feedback by blocking or unblocking transfers based on the current state. This feedback mechanism ensures that bus transfers are blocked only when necessary (during frequency transitions) and unblocked when safe, balancing reliability and productivity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8468286B2Variable-frequency bus adapter, adapting method and system
Publication Date: 2013.06.18 XFUSION DIGITAL TECH CO LTD
  • US8468286B2 patent drawing
  • US8468286B2 patent drawing
  • US8468286B2 patent drawing

AI summary

A variable-frequency bus adapter, a variable-frequency bus adapting method and a variable-frequency bus adapting system are provided. The method includes: generating a bus blocking indication according to a dynamic frequency scaling (DFS) request signal sent by a bus side; blocking a current bus transfer according to the bus blocking indication; and feeding back a DFS response signal to the bus side after blocking the current bus transfer, where the DFS response signal is adapted to enable the bus side to perform a DFS operation. In the method, the bus transfer is temporarily blocked during the DFS, so that undesired influence on peripheral components caused by unstable bus block during the bus DFS is reduced without increasing the number of clock domains of the system or modifying the peripheral components, thus reducing the complexity of the implementation of the system, and improving the applicability of dynamic voltage frequency scaling (DVFS).