Bus Address Sharing via Clock Duty Cycle Device Selection
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Solution Overview
Problem
Existing data communication buses are limited in the number of peripheral devices they can connect due to the need for unique bus addresses, and mechanisms that avoid address conflicts by using buffers increase latency and cost.
Innovation Solution
A data communication bus controller modulates the clock signal duty cycle to allow multiple peripheral devices to share the same address without requiring buffers or additional buses, using threshold conditions to select the intended device for communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each peripheral device is assigned a unique bus address, then address conflicts are avoided, but the number of connectable peripheral devices is limited
Solution Approach 1:
The patent changes the parameter used for device selection from static address to dynamic clock signal characteristics. Multiple devices can share the same address by responding to different clock signal parameters (duty cycle, frequency, pulse width), thereby increasing the number of connectable devices without address conflicts
Solution Approach 2:
The patent adds a new dimension for device differentiation by introducing clock signal modulation characteristics. Instead of relying solely on the address dimension, devices are distinguished by their response to varied clock signal parameters, effectively adding another layer of addressing capability
2Reliability
If buffers are used to separate peripheral devices on the same bus address, then address conflicts are avoided, but latency and cost increase
Solution Approach 1:
The patent extracts the device selection function from the address domain and relocates it to the clock signal domain. By modulating clock signal parameters, the system可以直接 select between devices sharing the same address without requiring buffers, eliminating the latency introduced by buffer-based separation mechanisms
Solution Approach 2:
The patent uses modulated clock signals as an intermediary mechanism for device selection. Instead of using buffers as intermediaries to separate devices, the system employs clock signal parameter modulation as a non-intrusive mediator that enables direct device selection without adding latency or cost
3Reliability
If buffers are used to separate peripheral devices on the same bus address, then address conflicts are avoided, but system cost increases
Solution Approach 1:
The patent replaces expensive buffer components with inexpensive clock signal modulations. By using software-controlled clock parameter changes instead of hardware buffers, the system achieves the same device separation function at lower cost and reduced complexity
Solution Approach 2:
The patent substitutes the mechanical/hardware buffer system with a software-controlled signal modulation system. Clock signal parameters are programmatically adjusted to select devices, replacing the physical buffer infrastructure and reducing both cost and complexity
Data Source
AI summary
A computer-implemented method for data communication bus address sharing can include selecting, by at least one processor, one of two or more peripheral devices sharing an address of a data communication bus. The method can additionally include modulating, by the at least one processor, a duty cycle of a clock signal transmitted over the data communication bus to the two or more peripheral devices, wherein the modulating causes a low period of the clock signal to satisfy a threshold condition for indicating selection of the selected one of the two or more peripheral devices. The method can also include performing, by the at least one processor using the address, data communication over the data communication bus with the selected one of the two or more peripheral devices. Various other methods, systems, and computer-readable media are also disclosed.