Bus Arbitration Address Capture for Serial Link Latency Reduction
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Solution Overview
Problem
In mobile communication devices, serial data links introduce latency that prevents the conversion of physical command and control signals to virtual signals, particularly in real-time embedded systems, where meeting transmission deadlines is crucial, and existing protocols struggle to optimize latency across varying use cases and coexistence with other protocols.
Innovation Solution
The system captures the sending device's address during bus arbitration, allowing the receiving device to create a register address offset to prevent unintentional overwriting of register space locations by obtaining an address region specific to the sending device within its register space and writing the payload accordingly, enabling efficient communication of datagrams over a serial link.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If physical command and control signals are converted to virtual signals over serial data links, then GPIO pin consumption is reduced, but transmission latency increases and real-time deadlines cannot be met
Solution Approach 1:
The receiving device captures the sending device address during bus arbitration phase, before the actual datagram transmission occurs. This preliminary capture eliminates the need for address exchange during data transmission, reducing overall latency while maintaining the virtual signal conversion benefits
2Device complexity
If multiple devices share a common register space, then device complexity is reduced, but unintentional overwriting of register locations occurs
Solution Approach 1:
The common register space is segmented into device-specific address regions based on the captured sending device address. Each sending device is allocated a unique address region, preventing overwriting while maintaining a unified register space architecture. The register address is modified by incorporating the captured address to form a device-specific offset
Solution Approach 2:
The captured sending device address acts as an intermediary to map between the common register space and device-specific regions. This intermediary mechanism enables automatic address translation without requiring dedicated physical connections or complex addressing protocols
3Ease of operation
If serial communication protocols use standard addressing methods, then protocol simplicity is maintained, but latency increases due to additional address exchange steps
Solution Approach 1:
The sending device address is captured during the bus arbitration phase, which occurs before formal datagram transmission. This preliminary capture eliminates the need for separate address exchange steps during data transmission, reducing latency while maintaining protocol simplicity
Solution Approach 2:
The address capture function is merged with the existing bus arbitration mechanism. By utilizing the arbitration phase for address capture, the protocol avoids adding separate address exchange steps, thereby reducing latency without increasing protocol complexity
Data Source
AI summary
Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A receiving device captures a sending device address during bus arbitration and receives a datagram subsequent to the bus arbitration. The datagram includes at least a register address and a payload. The receiving device obtains an address region specific to the sending device within a register space of the receiving device based on the captured sending device address and the register address included in the datagram and writes the payload of the datagram to the register space according to the obtained address region.