Embedded Bus Arbitration via Critical Section Segmentation

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Solution Overview

Problem

Embedded systems face performance compromises due to contention between multiple simultaneous data bursts, as existing arbitration methods do not effectively manage priority at multiple points within the system.

Innovation Solution

A method where a critical section of each data burst is identified and processed with higher priority, with a tag indicating the length of the critical section included in data requests, allowing arbitration devices to optimize transaction processing and reduce latency by prioritizing critical sections over non-critical sections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data bursts are transferred simultaneously between multiple master devices and resource devices in an embedded system, then the system can operate with multiple active transactions, but contention arises requiring arbitration that compromises overall system performance

Engineering Contradiction:
Improvesystem throughputVSAvoidtransaction delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments each data burst into a critical section and a non-critical section. The critical section contains data words that must be transferred with high priority (e.g., cache miss data), while the non-critical section contains less time-sensitive data. This segmentation allows the arbitration device to prioritize critical sections over non-critical sections, reducing transaction delay for important data while maintaining overall system throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different quality of service (QoS) characteristics to different parts of the same data burst. By tagging the critical section with higher priority metadata, the system provides localized high-priority service to specific portions of the transaction while allowing standard service for non-critical portions. This resolves the contradiction by ensuring time-sensitive data gets fast service without forcing all transactions to be slow.

Inventive Principle:
Principle #3Local quality

2Reliability

If existing arbitration methods are used to manage contention at multiple points in the system, then arbitration can be performed, but the methods do not effectively manage priority and compromise performance

Engineering Contradiction:
Improvearbitration effectivenessVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary action by tagging data bursts with metadata indicating the length of the critical section before the arbitration process begins. This pre-marking of critical data allows arbitration devices at multiple points in the system to immediately recognize and prioritize critical sections without requiring complex real-time analysis. The preliminary tagging ensures reliable arbitration effectiveness while maintaining high system performance.

Inventive Principle:
Principle #10Preliminary action

3Loss of time

If critical sections of data bursts are identified and prioritized using metadata tags, then latency to critical sections is reduced, but the system requires additional processing to handle the metadata

Engineering Contradiction:
Improvecritical section latencyVSAvoidarbitration device complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent extracts the arbitration complexity from the main data path by handling metadata separately from the actual data transfer. The arbitration device only needs to examine the compact metadata tag to determine priority, while the bulk data transfer proceeds independently. This extraction reduces critical section latency while limiting the increase in device complexity to only the metadata processing logic.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9727497B2Resolving contention between data bursts
Publication Date: 2017.08.08 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US9727497B2 patent drawing
  • US9727497B2 patent drawing
  • US9727497B2 patent drawing

AI summary

In an embedded system, there are a plurality of data requesting devices, a plurality of data sources and a bus fabric interconnecting the data requesting devices and the data sources, wherein the bus fabric comprises a plurality of bus components. Some or all of the data sources and arbitration devices associated with the bus components resolve contentions between data bursts by selecting a first one of the contending data bursts; determining a length of a critical section of the first selected data burst; and processing the critical section of the selected data burst. Then, a second one of the contending data bursts is selected, a length of a critical section of the second selected data burst is determined, and the critical section of the second selected data burst is processed before a non-critical section of the selected data burst.