Bus Bandwidth Management via Supervisor Buffering

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Solution Overview

Problem

Conventional computing systems lack efficient management of bus bandwidth for multiple drivers, leading to fairness and performance issues as one driver can exhaust available bandwidth, preventing other drivers from accessing devices.

Innovation Solution

A system that centrally manages bus bandwidth by initially writing data from drivers to a supervisor-controlled portion of main memory (RAM) instead of device memory, allowing data to be forwarded to device memory only when sufficient bandwidth is available, using a threshold value to determine bandwidth sufficiency and dynamically adjusting mapping based on bandwidth conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a driver is allowed to send unlimited write requests to device memory via the bus, then the driver can achieve high data transfer throughput, but the bus bandwidth is exhausted and other drivers are prevented from accessing devices

Engineering Contradiction:

Improvedata transfer throughputVSAvoidfairness of bus access

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent introduces a supervisor component as an intermediary between drivers and device memory. The supervisor intercepts write requests from drivers, buffers them in main memory, and forwards them to device memory when bandwidth is available. This mediator prevents any single driver from monopolizing bus bandwidth while maintaining high throughput for all drivers.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the direct write path from driver to device memory by introducing a buffer layer in main memory. Write requests are divided into two stages: first written to main memory (supervisor-controlled portion), then forwarded to device memory when bandwidth permits. This segmentation allows independent control of bandwidth allocation.

Inventive Principle:

Principle #1Segmentation

2Reliability

If the system uses static allocation of PCI bandwidth to a small number of applications, then resource conflicts are eliminated, but the system lacks flexibility to dynamically accommodate multiple drivers and changing bandwidth conditions

Engineering Contradiction:

Improveresource conflict preventionVSAvoiddynamic bandwidth allocation

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic bandwidth allocation through the supervisor component that monitors bus bandwidth availability and adjusts the forwarding of buffered data accordingly. The system transitions from static PCI bandwidth allocation to a dynamic model where the supervisor can pause or resume write operations based on real-time bandwidth conditions, accommodating multiple drivers fairly.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The supervisor employs feedback mechanisms by monitoring bus bandwidth conditions and adjusting its buffering and forwarding behavior accordingly. When bandwidth is sufficient, the supervisor forwards buffered data; when bandwidth is constrained, the supervisor pauses forwarding. This feedback loop enables adaptive resource allocation without resource conflicts.

Inventive Principle:

Principle #23Feedback

3Reliability

If the supervisor buffers data in main memory before forwarding to device memory, then bus bandwidth is protected from exhaustion, but additional memory management overhead is introduced

Engineering Contradiction:

Improvebus bandwidth protectionVSAvoidmemory management overhead

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The supervisor component manages the buffering process autonomously, intercepting write requests from drivers and automatically forwarding them to device memory when bandwidth is available. The driver code itself remains simple and unchanged, while the supervisor handles the complex memory management and bandwidth control logic, effectively shifting the complexity burden to the supervisor.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11567884B2Efficient management of bus bandwidth for multiple drivers

Publication Date: 2023.01.31 RED HAT LLC

AI summary

Systems and methods are disclosed for efficient management of bus bandwidth among multiple drivers. An example method may comprise: receiving a request from a driver to write data via a bus; reading contents of a random access memory (RAM) at a specified interval of time to determine whether the data written by the driver is accumulated in the RAM; responsive to determining that the data written by the driver is accumulated in the RAM, determining whether a bandwidth of the bus satisfies a bandwidth condition; and responsive to determining that the bandwidth satisfies the bandwidth condition, forwarding, via the bus, a portion of the data written by the driver in the RAM to a device memory of a device.