Bus Bar Layout for Parasitic Inductance Reduction

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Solution Overview

Problem

Existing power conversion circuits in electronic devices face challenges in reducing parasitic inductance and improving dielectric strength, particularly when dealing with high voltage differences between transmission paths, which affects performance and reliability.

Innovation Solution

The electronic device incorporates a configuration where conductor bars with specific extensions and orientations are used, with insulators in between, to minimize parasitic inductance and enhance dielectric strength by leveraging mutual inductance and strategic placement of bus bars and insulating plates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If transmission paths for high-side and low-side potentials are disposed close to each other to reduce parasitic inductance using mutual inductance, then electrical characteristics (power conversion efficiency) are improved, but dielectric strength deteriorates due to high voltage difference reaching several hundreds of volts

Engineering Contradiction:
Improveparasitic inductanceVSAvoiddielectric strength
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The conductor bars are arranged in a three-dimensional configuration where they extend in a first direction intersecting with the board surface, with insulators positioned between them. This spatial arrangement in multiple dimensions allows the conductor bars to be close enough for mutual inductance while maintaining sufficient insulation distance for dielectric strength.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Insulators are introduced as intermediary elements between the high-side and low-side conductor bars. These insulators act as mediators that enable the conductor bars to be disposed close to each other for reduced parasitic inductance while preventing direct electrical breakdown, thus maintaining dielectric strength.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of energy

If conductor bars are extended to reduce parasitic inductance, then electrical characteristics are improved, but device complexity increases due to multiple portions and directions of extension

Engineering Contradiction:
Improveparasitic inductanceVSAvoidconductor bar configuration
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The conductor bars are designed with multiple portions (first, second, and third portions) that serve multiple functions: the first portion provides mutual inductance for reducing parasitic inductance, the second and third portions provide insulation clearance for dielectric strength, and the overall structure enables both electrical performance and mechanical stability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces parasitic inductance and increases dielectric strength, leading to improved power conversion efficiency and reliability, especially in high-voltage applications like power supply systems for air conditioners and industrial equipment.

Implementation Method 1

a transmission path which supplies a high-side potential to a semiconductor part constituting a power conversion circuit and a transmission path which supplies a low-side potential to a semiconductor part constituting the power conversion circuit are disposed close to each other, whereby an influence of parasitic inductance of each transmission path is reduced by using mutual inductance

Methodology Applied
Scientific EffectMutual inductance: Electromagnetic Induction

Data Source

PatentUS10490484B2Electronic device
Publication Date: 2019.11.26 RENESAS ELECTRONICS CORP
  • US10490484B2 patent drawing
  • US10490484B2 patent drawing
  • US10490484B2 patent drawing

AI summary

An electronic device has a first bus bar (conductor plate) connected to a first semiconductor device (semiconductor part) having a first power transistor; and a second bus bar (conductor plate) connected to a second semiconductor device (semiconductor part) having a second power transistor. The first and second bus bars have first portions facing each other with an insulating plate interposed therebetween and extending in a Z direction intersecting with an upper surface (main surface) of a board. The first bus bar has a second portion located between the first portion and a terminal (exposed portion) and extending in an X direction away from the second bus bar and a third portion located between the second portion and the terminal and extending in the X direction. An extension distance of the third portion in the Z direction is shorter than an extension distance of the second portion in the X direction.