Bus Bar Power Transistor Package DC Bias Termination
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Solution Overview
Problem
Conventional power transistor packages face limitations in carrying high operating currents due to limited wire bond connections between DC feed terminals and output capacitors, leading to unbalanced low-frequency termination points and unintentional LC filtering, which degrades performance and restricts the number of transistors that can be included in a package.
Innovation Solution
A bus bar is mechanically fastened to an electrically conductive flange to connect and extend between DC bias terminals, providing a low-frequency and DC connection that minimizes IR drop and allows for more balanced terminations across the drain of the power transistor, enabling increased current handling and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonds are used to connect DC feed terminals to output capacitors, then electrical connections can be made, but the current carrying capability is limited due to the small number of available bond wires
Solution Approach 1:
The DC feed terminal structure is segmented into multiple parallel connection paths, each with its own wire bond connection to the output capacitor. This segmentation allows the total DC current to be distributed across multiple independent paths, significantly increasing the overall current carrying capability while maintaining manageable complexity in each individual connection path.
2Reliability
If DC power is fed only to the ends of the output capacitor, then simple terminal connections are achieved, but IR drop occurs between the ends and center region of the capacitor node, creating unbalanced low frequency termination points
Solution Approach 1:
The DC feed terminal structure is designed to create equipotential regions across the capacitor node by providing multiple DC feed terminals at different locations (ends and center) that are all maintained at the same DC potential. This equipotential design eliminates IR drop between different regions of the capacitor node, ensuring balanced low frequency termination points across the entire drain region of the power transistor.
3Productivity
If the capacitor length is increased to accommodate more power transistors, then more transistors can be included in the package, but the IR drop across the capacitor node worsens, limiting the effective use of capacitor length
Solution Approach 1:
The capacitor node is segmented into multiple regions with separate DC feed terminals (end terminals and center terminals) that can be independently biased. This segmentation allows each region to be independently optimized for minimal IR drop, enabling the capacitor to be made longer to accommodate more power transistors without suffering from cumulative IR drop effects that would limit the effective use of capacitor length.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances current-carrying capability, reliability, and flexibility, providing balanced termination points and improved high-frequency characteristics, allowing for higher power applications and increased operating signal bandwidth.
Implementation Method 1
electrically connecting the bus bar to the drain via one or more RF grounded connections
Implementation Method 2
mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange
Data Source
AI summary
According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange; connecting the flange to a source of a power transistor device; electrically connecting the first terminal to a gate of the power transistor device; electrically connecting the second terminal to a drain of the power transistor device; mechanically fastening a bus bar to the flange which extends between and connects the DC bias terminals; and electrically connecting the bus bar to the drain via one or more RF grounded connections.