Bus Bridge Arbitration Unit for AMBA APB Idle Time Reduction
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Solution Overview
Problem
Conventional bus systems, such as those based on Advanced Microcontroller Bus Architecture (AMBA), suffer from limited data rate and high idle state time for second peripheral devices due to the requirement of two clock cycles to access these devices, resulting in suboptimal utilization of the Advanced Peripheral Bus (APB).
Innovation Solution
A bus system with a bridge and multiplexer architecture that includes an arbitration unit to coordinate access between first and second masters, allowing simultaneous or staggered access to the second bus, thereby increasing data rate and reducing idle time by ensuring efficient utilization of the transmission rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the conventional AMBA bus architecture requires two clock cycles to access second peripheral devices via AHB and APB, then the system maintains simple timing and control, but the data rate on the APB is limited to 50% of the maximum data rate of the AHB and second peripheral devices are in idle state for at least 50% of the time
Solution Approach 1:
The patent introduces a bridge component as an intermediary between the AHB and APB buses. This bridge includes an arbitration unit that mediates access requests from multiple masters to the second bus, coordinating timing and granting access to maximize utilization. The bridge translates AHB transactions to APB transactions and manages the multiplexer that switches between different masters, thereby resolving the timing constraints without requiring complex changes to the underlying bus architectures.
Solution Approach 2:
The patent implements dynamic access arbitration where the arbitration unit dynamically determines which master (first or second) gets access to the second bus based on current conditions. The system transitions from static two-clock-cycle timing to dynamic arbitration that can grant access in single clock cycles when possible, adapting the timing based on request patterns and bus availability, thereby increasing overall data rate while maintaining architectural simplicity.
2Productivity
If the conventional APB timing allows access only every second clock cycle, then the timing and control logic remains simple, but the utilization of the transmission rate of the second bus is reduced and idle state time of second peripheral devices increases
Solution Approach 1:
The arbitration unit performs preliminary arbitration before granting bus access, evaluating multiple master requests in advance and determining the optimal access sequence. By pre-coordinating access rights and preparing translation sequences, the system can grant immediate access to the second bus when available, eliminating idle wait states for second peripheral devices while maintaining simple timing logic through the arbitration unit's predictive scheduling.
Solution Approach 2:
The patent ensures continuous useful action on the second bus by implementing an arbitration mechanism that continuously evaluates and grants access to requesting masters. The multiplexer continuously switches between first and second masters based on arbitration decisions, ensuring the second bus operates at full transmission rate without idle cycles, thereby maximizing utilization and eliminating peripheral device idle time while keeping the underlying bus timing simple.
3Adaptability or versatility
If multiple masters access the second bus simultaneously in conventional systems, then access flexibility increases, but conflicts and data rate reduction occur due to lack of coordination
Solution Approach 1:
The bridge acts as an intermediary that receives access requests from multiple masters simultaneously and coordinates their access to the second bus. The arbitration unit within the bridge mediates between first master (via AHB) and second master (via APB) requests, granting access in a coordinated manner that prevents conflicts. This mediation maintains access flexibility for multiple masters while ensuring the second bus operates at maximum data rate through conflict-free sequential access.
Solution Approach 2:
The arbitration unit implements feedback mechanisms where it continuously monitors bus availability and master requests, adjusting access grants in real-time. When the second bus becomes available, the arbitration unit provides feedback signals to waiting masters, enabling them to proceed with access. This feedback-driven coordination allows multiple masters to access the second bus flexibly while maintaining high data rate through efficient conflict resolution and bus utilization optimization.
Data Source
AI summary
Bus system comprising a first bus and a second bus, wherein the first bus is connected to the second bus through a bridge and a multiplexer. A first master has access to the second bus via the first bus, the bridge and the multiplexer. A second master has access to the second bus via the multiplexer. The bridge comprises an arbitration unit which is arranged to allow both a first master and a second master access to the second bus in such a way that no access is disturbed or lost.