Bus System Buffer Overrun Recovery via Segmented Reset Control
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Solution Overview
Problem
In electronic devices, bus systems often experience data loss due to increased load or errors, leading to inefficiencies and the need for system resets, particularly in split transaction scenarios where buffer overruns can occur, resulting in lost requests and acknowledgments.
Innovation Solution
An electronic device is designed with a memory, multiple master circuits, a transmission path that buffers and arbitrates instructions and data, a detection unit to identify buffer overruns, and a reset control unit that performs targeted resets to affected portions of the transmission path and master circuits to recover from buffer overruns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a system reset is performed to recover from buffer overrun, then data loss is prevented, but system productivity decreases due to complete reset
Solution Approach 1:
The patent divides the bus system into multiple independent segments (individual master circuits and transmission path portions) that can be reset independently. When a buffer overrun occurs, only the affected segment is reset rather than the entire system, maintaining productivity while ensuring data integrity through targeted recovery.
2Productivity
If the transmission path buffers more data to handle increased load, then productivity improves, but the risk of buffer overrun increases
Solution Approach 1:
The patent implements a detection unit that continuously monitors the transmission path for buffer overrun conditions. When an overrun is detected, the system provides feedback by triggering a selective reset of the affected portion, creating a closed-loop control mechanism that maintains reliability while allowing high buffering capacity for productivity.
3Productivity
If selective reset is implemented to maintain productivity, then system complexity increases, but this resolves the contradiction with reliability
Solution Approach 1:
The patent extracts the detection and reset control functions as separate, dedicated units (detection unit and reset control unit) that operate independently from the main data transfer path. This modular approach manages complexity by isolating control logic while maintaining continuous productivity in the data path.
Data Source
AI summary
An electronic device includes a memory, plural master circuits, a transmission path, a detection unit, and a reset control unit. The plural master circuits read and write data from and into the memory. Plural instructions and data are transmitted through the transmission path while buffering and arbitrating the instructions and the data. The detection unit detects a buffer overrun in the transmission path. The reset control unit performs reset control for a portion of the transmission path affected by the buffer overrun and master circuits, of the plural master circuits, affected by the buffer overrun.