Communication Bus Chip Detection Using Compensation Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing chip detection schemes in host devices fail to accurately identify abnormal chips, leading to incomplete detection of functional chips and potential system crashes due to abnormal chips affecting communication bus operations.
Innovation Solution
A method and device that generates a compensation signal on the communication bus when an abnormal chip is detected, allowing normal chips to generate their target events, ensuring complete detection and preventing system crashes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a traditional chip detection scheme is used where each chip outputs a low-level signal in sequence after receiving a clock synchronization signal, then the detection process is simple to implement, but if an abnormal chip exists, it cannot output its signal and causes subsequent chips to fail detection
Solution Approach 1:
The patent introduces a host device as an intermediary that coordinates the detection process. The host device sends clock synchronization signals and receives low-level signals from chips, managing the detection sequence centrally. This mediator approach allows the system to handle abnormal chips gracefully by controlling the detection flow and ensuring that each chip's detection status is independently tracked, thus maintaining detection completeness even when some chips fail to respond.
Solution Approach 2:
The detection scheme incorporates feedback mechanisms where the host device monitors whether each chip successfully outputs its low-level signal. When a chip fails to respond or an abnormal condition is detected, the system uses feedback information to adjust the detection process, such as retrying detection or skipping to the next chip. This feedback loop ensures that detection abnormalities are identified and handled appropriately, maintaining overall system reliability.
2Stability of the object's composition
If chips determine whether to output low-level signals based on the number of detected low-level signals to avoid signal conflicts, then signal conflicts are avoided, but abnormal chips cause cascading failures where remaining chips cannot be detected
Solution Approach 1:
The patent segments the detection process into independent, sequential steps where each chip's detection is handled individually. The host device manages the detection of each chip separately, tracking the detection status of each chip independently. This segmentation allows the system to identify which specific chip is abnormal without the cascading failure effect, as each chip's detection outcome is isolated and recorded separately rather than being interdependent.
Solution Approach 2:
The system uses a standardized detection protocol where the host device sends identical clock synchronization signals to all chips and expects standardized low-level responses. This copying approach creates a uniform detection framework that can be applied to each chip consistently. When a chip fails to respond according to the expected pattern, the abnormality is identified by comparing against the standard protocol, enabling precise identification of abnormal chips without disrupting the detection of others.
Data Source
AI summary
The present disclosure provides a communication method, a control device, a compensation signal generation control method and a device thereof, and a consumable. The communication method includes: detecting a target event on the communication bus, the communication bus being configured to be electrically connected to a first chip and at least one second chip, the target event including a compensation signal, and the compensation signal is used to indicate that some or all of the at least one second chip fail to generate a target event corresponding to the second chip on the communication bus as expected; determining whether the detected target event meets expectations of the first chip based on the compensation signal; and when it is determined that the detected target event meets the expectations of the first chip, generating a target event corresponding to the first chip on the communication bus.