Bus Circuit Oscillation Suppression at Bit Boundaries
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Solution Overview
Problem
Prolonged oscillations in bus voltage due to improper termination or topology in bus systems lead to error-prone data transmission, especially at increased transmission rates, which existing technologies fail to effectively mitigate.
Innovation Solution
A circuit with an ascertainment circuit that identifies specific time windows around bit boundaries and a suppression circuit that is selectively connected between bus terminals to attenuate voltage oscillations, preventing erroneous activations and maintaining robust communication by adjusting impedance values based on state transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a suppression circuit is continuously connected between bus terminals to attenuate voltage oscillations, then oscillation reduction is improved, but unnecessary impedance reduction occurs outside state transition periods
Solution Approach 1:
The ascertainment circuit detects state transitions (dominant to recessive) in advance and activates the suppression circuit precisely when needed, before oscillations occur. This preliminary detection and timed activation prevents unnecessary impedance reduction while ensuring oscillation suppression is applied exactly when state transitions are detected, resolving the contradiction between continuous suppression and energy efficiency.
2Reliability
If the suppression circuit is activated based on single state transitions, then oscillation response is improved, but erroneous activations from short-term signal interferences occur
Solution Approach 1:
The ascertainment circuit continuously monitors bus signal states and uses feedback from multiple state transition detections to validate suppression circuit activation. By requiring confirmed state transitions rather than reacting to single detections, the system filters out erroneous signals while maintaining responsive oscillation suppression, resolving the contradiction between activation sensitivity and detection accuracy.
3Productivity
If transmission rate is increased to improve productivity, then data transmission speed is improved, but oscillation-induced errors increase
Solution Approach 1:
The suppression circuit acts as an intermediary element connected between bus terminals, providing localized oscillation damping without affecting the overall bus topology or transmission protocol. This intermediary approach allows high-speed data transmission to continue while the suppression circuit mediates oscillation effects at critical points, resolving the contradiction between transmission speed and accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces voltage oscillations during state transitions, enhancing communication robustness by minimizing unnecessary impedance reduction and preventing erroneous signal classifications, thus improving data transmission reliability.
Implementation Method 1
the suppression circuit is configured to be connected with at least two different impedance values between the two bus-side terminals, and to then lower the impedance value of the connected suppression circuit when a state transition from the first state into the second state occurs
Data Source
AI summary
A circuit for a bus system is provided. The circuit includes: an ascertainment circuit, which is configured to ascertain a first state in which an absolute difference of a voltage between two bus-side terminals is above a threshold value, to ascertain a second state in which the absolute difference of the voltage between the two bus-side terminals is below a threshold value, to ascertain a bit boundary as a function of a number of state transitions between the first and second state, and a suppression circuit, which is configured to connect a suppression circuit between the two bus-side terminals before the bit boundary.


