Communication Bus Circuit Latency Reduction via Broadcast Coordination
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Solution Overview
Problem
Serial communication protocols, such as I2C and CAN, often introduce undesirable latency when a host device needs to receive data from multiple slave devices due to individual addressing, which is problematic in applications requiring fast response times like automotive systems.
Innovation Solution
A system with a communication bus and circuits that coordinate data transmission to form a sequential data stream using synchronization signals, allowing multiple communication circuits to transmit data in a predetermined order, thereby reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If individual addressing of slave devices is used in serial communication protocols, then device identification and data retrieval are achieved, but communication latency increases
Solution Approach 1:
The host device sends a broadcast address to all slave devices simultaneously, allowing all devices to prepare their data in advance. This preliminary action eliminates the need for sequential individual addressing, as all slave devices are notified at once and can transmit their data in a coordinated manner, significantly reducing communication latency.
Solution Approach 2:
The system implements a structured communication sequence where a broadcast request is followed by a predetermined ordered response from multiple slave devices. This periodic action pattern ensures that data is retrieved in a systematic sequence (e.g., by device address) without requiring the host to send individual addressing requests for each device, thereby improving data retrieval speed while maintaining organized communication.
2Productivity
If sequential individual requests are sent to multiple slave devices, then data from each device is received, but communication efficiency decreases
Solution Approach 1:
The patent merges multiple individual communication transactions into a single broadcast transaction. Instead of sending separate requests to each slave device, the host sends one broadcast message that triggers simultaneous data transmission from all slave devices. This merging of communication operations significantly improves communication efficiency by reducing the total number of protocol handshakes and arbitration cycles required.
Solution Approach 2:
The broadcast address acts as an intermediary mechanism that simultaneously addresses all slave devices. This intermediary approach allows the host to communicate with multiple devices through a single address, enabling parallel data retrieval without the need for sequential individual addressing, thus improving both efficiency and response time.
3Device complexity
If multiple slave devices are addressed individually, then data accuracy and device specificity are maintained, but system complexity increases
Solution Approach 1:
The patent segments the data retrieval process into two distinct phases: a broadcast request phase where all devices are notified simultaneously, and an ordered response phase where devices transmit data in a predetermined sequence. This segmentation maintains data communication reliability through structured ordering while simplifying the overall protocol by eliminating the need for repeated individual addressing sequences.
Solution Approach 2:
The system maintains continuous useful action by keeping the communication bus actively utilized throughout the data retrieval process. After the initial broadcast, the bus continuously carries data from multiple slave devices in sequence without idle periods for re-addressing, ensuring reliable data transmission while reducing the time and complexity associated with repeated protocol initialization for each device.
Data Source
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AI summary
A system for communicating between electronic devices on a communication bus includes a communication bus and one or more communication circuits each having an output driver coupled to the communication bus and each having an input terminal. Each communication circuit produces, in response to a request message, a data communication on the communication bus in a predetermined order with respect to data communications from other communication circuits so that the data communications from each communication circuit form a sequential data stream in response to the request message.