Bus Connector Block Direct Master-to-Master Data Path

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Solution Overview

Problem

Current System On Chip (SOC) designs face inefficiencies in data transfer between master blocks due to the need for intermediate slave blocks as data buffers, leading to increased complexity and reduced data throughput, especially in high-performance applications with numerous communication and multimedia components.

Innovation Solution

A method and apparatus that create a direct data path between two or more master blocks on chip, eliminating the need for intermediate slave blocks by using a bus connector block to manage arbitration, address decoding, and implement a store-and-forward process, allowing direct communication and reducing dummy data transfers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If intermediate slave blocks are used as data buffers for master-to-master transfers, then data transfer can be facilitated through existing bus architecture, but system complexity increases and data throughput decreases

Engineering Contradiction:

Improvesystem complexityVSAvoiddata throughput

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The invention extracts the buffer function from traditional slave blocks and relocates it to a dedicated buffer module within the bus connector. This separation allows master blocks to communicate directly while the buffer handles intermediate storage needs, eliminating the complexity of intermediate slave blocks while maintaining data throughput efficiency

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The bus connector is introduced as an intermediary component that mediates between master blocks. It provides the buffer function and manages data routing, allowing direct master-to-master transfers without requiring intermediate slave blocks, thus reducing system complexity while maintaining high data throughput

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If intermediate slave blocks are used as data buffers, then data transfer between master blocks is enabled, but the number of dummy data transfers increases

Engineering Contradiction:

Improvedata transfer efficiencyVSAvoiddummy transfer time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The bus connector acts as an intermediary that intelligently routes data directly between master blocks when possible, and only uses the buffer when actually needed. This eliminates dummy transfers to and from intermediate slave blocks, reducing time loss while maintaining data transfer efficiency

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer within the bus connector is pre-positioned and ready to perform store-and-forward operations when needed. This preliminary preparation allows the system to execute direct transfers without dummy operations, as the buffer is already in place to handle actual data routing needs efficiently

Inventive Principle:

Principle #10Preliminary action

3Productivity

If direct master-to-master paths are created, then data throughput efficiency improves, but bus architecture complexity increases

Engineering Contradiction:

Improvedata throughput efficiencyVSAvoidbus architecture complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The invention merges the buffer function with the bus connector, combining multiple functions (arbitration, address decoding, and buffering) into a single integrated component. This consolidation enables direct master-to-master paths and high data throughput efficiency without proportionally increasing overall bus architecture complexity

Inventive Principle:

Principle #5Merging (Combining)

4Ease of operation

If slave blocks are used as data buffers, then master-to-master transfer is possible, but the direct communication path is blocked

Engineering Contradiction:

Improvecommunication directnessVSAvoiddata transfer performance

Core Design Contradiction:

Ease of operationVSProductivity

Solution Approach 1:

The bus connector serves as a mediator that enables direct communication between master blocks while providing buffering capabilities when needed. This eliminates the need for communication through intermediate slave blocks, maintaining direct communication paths and high data transfer performance simultaneously

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9104819B2Multi-master bus architecture for system-on-chip

Publication Date: 2015.08.11 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)

AI summary

A system on chip and associated method facilitates transfer of data between two or more master blocks through a bus on chip. The system creates a direct path for data transferring from a master port of a bus to another master port of the same bus. The bus includes a plurality of signals used to transfer data, address or control information between two or several blocks on chip. The behavior of bus connector block is controlled according to the destination of data coming from a master port. The system includes a master-connector-slave arrangement that enables the direct data communication between two or several master blocks, without taking any slave blocks as the data buffer. A bus connector block is configured to manage bus arbitrating and address decoding, and particularly to create the direct data path between master blocks.