Bus Driver Circuit Symmetry Control via RC Networks
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Solution Overview
Problem
Existing bus driver circuits face challenges in achieving high symmetry between bus signal lines for reduced electromagnetic radiation emission, while also requiring current mode output for immunity and low power consumption, especially in applications with varying slope requirements.
Innovation Solution
A bus driver circuit design that utilizes a capacitor and RC networks to pre-shape the gate voltage drive, allowing for adjustable waveform characteristics through independently switchable resistors and capacitors, enabling flexible adjustment of slope and delay to achieve symmetry and immunity, and incorporating charging and discharging accelerating circuits for precise signal control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a symmetrical output voltage is used to reduce electromagnetic radiation emission, then electromagnetic radiation emission is reduced, but power consumption increases
Solution Approach 1:
The patent implements dynamic control of the output voltage symmetry through complementarily driven first and second switches that selectively connect or disconnect capacitors based on the data signal state. This dynamic switching allows the circuit to adapt between symmetrical and asymmetrical output configurations, optimizing the balance between electromagnetic radiation reduction and power consumption based on transmission requirements
Solution Approach 2:
The patent changes the electrical parameters (voltage levels, capacitance connections) dynamically through the switch control mechanism. By varying the capacitance connections in response to data signal transitions, the circuit adjusts its output characteristics to achieve low electromagnetic radiation only when needed, while consuming less power during normal operation
2Manufacturing precision
If RC networks with multiple resistors and capacitors are used to pre-shape gate voltage drive, then waveform precision and symmetry are improved, but device complexity increases
Solution Approach 1:
The patent segments the capacitance into multiple discrete capacitor elements (first capacitor, second capacitor, third capacitor) that can be independently connected or disconnected through switches. This segmentation allows precise control over the RC time constants and waveform shaping while maintaining modularity, making the complex function manageable and adjustable
Solution Approach 2:
The patent pre-shapes the gate voltage drive waveform by pre-charging capacitors through controlled RC networks before the actual switching event. This preliminary action ensures that when the main switching occurs, the voltage transitions are already optimized for symmetry and precision, reducing the need for complex real-time adjustments
3Reliability
If complementarily driven switches are used to control capacitor connections, then signal symmetry and immunity are improved, but ease of operation decreases
Solution Approach 1:
The patent employs complementarily driven switches where the control signals are inherently linked through feedback mechanisms. When one switch closes, the other opens, creating a self-regulating system that maintains proper voltage levels and capacitance connections automatically, reducing the operational burden while ensuring signal immunity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces electromagnetic radiation emission, enhances signal immunity, and minimizes power consumption by allowing for precise adjustment of bus signal characteristics, suitable for both high and low slope applications, and can be calibrated post-production without requiring new masks.
Implementation Method 1
a first capacitor connected to the gate of the first transistor for driving the voltage at the gate of the first transistor
Implementation Method 2
a first RC network comprising at least one resistor and at least one capacitor; and a second switch connecting/disconnecting the first capacitor to a predetermined fixed potential for discharging the first capacitor via a second RC network comprising at least one resistor and at least one capacitor
Data Source
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AI summary
A bus driver circuit for driving a bus voltage is provided. The bus driver circuit comprises: a bus line output (CANL) the bus voltage of which is driven by the bus driver circuit; a first transistor (M1) having a gate, the voltage at the gate of the first transistor (M1) determining the bus voltage at the bus line output (CANL); a first capacitor (C1) connected to the gate of the first transistor (Ml) for driving the voltage at the gate of the first transistor (M1); a first switch (S1) connecting/disconnecting the first capacitor (C1) to a first voltage source (Vgm) via a first RC network comprising at least one resistor and at least one capacitor; and a second switch (S2) connecting/disconnecting the first capacitor (C1) to a predetermined fixed potential (GND 2) for discharging the first capacitor (C1) via a second RC network comprising at least one resistor and at least one capacitor. The first switch (S1) and the second switch (S2) are complementarily driven by a signal (TxD) on a data line.