Bus Driver Circuit Dynamic Impedance Control
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Solution Overview
Problem
Existing bus driver circuits face challenges in achieving fast transitions between dominant and recessive states due to bus line capacitance and resistance, leading to slow switching times and unwanted oscillations, which can interfere with high data rate communication and cause bit distortion.
Innovation Solution
A bus driver circuit with a transmitter and receiver that adjusts a parameter set to control the switching behavior of its output stage, including the use of auxiliary transistors to provide a parallel current path during transitions, thereby reducing the effective resistance and accelerating the discharge of bus capacitance, and a control circuit to measure and adapt the loop delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the bus driver circuit uses a resistor to generate the recessive state, then the circuit structure is simple, but the switching time becomes slow due to bus line capacitance and resistance
Solution Approach 1:
The patent applies dynamics by making the output impedance adjustable rather than fixed. The bus driver circuit dynamically changes its output impedance based on the switching state: using low impedance (via closed semiconductor switches) for dominant state transitions and high impedance (via resistors) for recessive state transitions. This dynamic adaptation allows fast switching when needed while maintaining simple resistor-based recessive state generation, resolving the contradiction between circuit simplicity and switching speed.
2Speed
If the bus driver circuit uses a low-impedance current path for dominant state, then the voltage level is applied quickly, but slow transitions to recessive state occur due to bus line capacitance
Solution Approach 1:
The patent uses dynamics by implementing time-dependent impedance switching. The control circuit switches between low-impedance and high-impedance configurations based on the desired transition direction. For dominant-to-recessive transitions, the circuit dynamically switches from low impedance to high impedance, enabling fast voltage changes in both directions and reducing transition duration while maintaining quick voltage application capability.
Solution Approach 2:
The patent applies periodic action through the oscillation damping mechanism. The control circuit detects oscillations during transitions and applies counteracting control signals at appropriate periods to dampen the oscillations. This periodic intervention stabilizes the transition process, preventing prolonged oscillatory behavior and effectively reducing the overall transition duration.
3Productivity
If the bus driver circuit transitions quickly between states, then high data rates are achieved, but unwanted oscillations occur during transitions
Solution Approach 1:
The patent implements feedback by using the receiver to monitor the bus line voltage during transitions and feed this information back to the control circuit. The control circuit analyzes the received signal for oscillations and adjusts the switching parameters in real-time to dampen oscillations. This closed-loop feedback mechanism enables fast transitions for high data rates while maintaining signal stability by actively suppressing oscillations as they occur.
Solution Approach 2:
The patent applies preliminary anti-action by proactively damping oscillations before they can significantly interfere with communication. The control circuit is designed to detect the onset of oscillations during transitions and immediately apply counteracting control signals to suppress them. This preliminary intervention prevents oscillations from growing to problematic levels, ensuring signal stability even during fast transitions required for high data rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the transition time from dominant to recessive states, minimizes oscillations, and optimizes loop delay, enhancing communication efficiency and reducing bit distortion, especially in high-data-rate systems like CAN FD.
Implementation Method 1
the use of auxiliary transistors to provide a parallel current path during transitions, thereby reducing the effective resistance and accelerating the discharge of bus capacitance
Implementation Method 2
the bus line (bus lines) can also have a significant resistance and, in particular, a capacitance, which has an influence on the switching time between a dominant and a recessive state
Data Source
AI summary
In accordance with an embodiment, a method includes receiving a transmission signal; converting the received transmission signal into a corresponding bus signal by driving an output stage of a transmitter having a plurality of switches, where a switching behavior of the plurality of switches of the output stage is dependent on a parameter set; converting the bus signal into a corresponding reception signal, wherein an edge of the reception signal is delayed by a loop delay relative to a corresponding edge in the transmission signal; determining a measurement value for the loop delay; and altering the parameter set in order to adapt the loop delay.