Bus Signal Encoder Pulse Shaping for Ethernet Jitter Compliance

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Solution Overview

Problem

Jitter in signals received by transceivers from Ethernet networks, particularly in 10BASE-T1S and 10BASE-T1L standards, complicates the generation of receive signals that need to meet specific standards, especially in applications like automotive and industrial settings where cost, weight, and distance are critical factors.

Innovation Solution

The proposed solution involves an encoder that detects edges in input signals and generates pulse sequences with specific ramp and hold portions, sampling the signal to determine voltage levels, and adjusting the output signal accordingly to mitigate jitter effects, ensuring compliance with maximum permitted jitter constraints while improving Electromagnetic Emission (EME) performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional encoding is used to generate receive signals from bus signals, then the transceiver can operate with simple circuitry, but jitter in the input signal causes the generated receive signal to fail to meet standard requirements

Engineering Contradiction:
Improvereceive signal complianceVSAvoidencoder circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encoder performs preliminary actions by detecting edges in advance and pre-calculating the required pulse sequences with specific ramp and hold portions. The hold portions are specifically designed to maintain voltage levels for predetermined minimum time periods, ensuring that even with jitter in the input signal, the output signal meets the required pulse width specifications before transmission occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The encoder dynamically changes voltage level parameters by generating pulses with specific ramp portions (changing voltage from first-pulse level to second-pulse level) and hold portions (maintaining voltage levels). The duration of these hold portions is adjusted to ensure minimum time periods are met, transforming the raw jittered input signal into a compliant output signal through controlled parameter modifications.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If the encoder generates pulses with extended hold portions to meet minimum time period requirements, then pulse width compliance is improved, but the signal transmission time increases

Engineering Contradiction:
Improvepulse width precisionVSAvoidsignal transmission time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The encoder applies partial action by adding hold portions only where necessary to meet minimum time period requirements, not extending the entire signal duration. The hold portions are inserted strategically between ramp portions to provide the exact minimum additional time needed, avoiding excessive time extension while ensuring compliance with pulse width specifications.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If the encoder samples the input signal multiple times to accurately determine voltage levels despite jitter, then measurement accuracy is improved, but the processing complexity increases

Engineering Contradiction:
Improvevoltage level detection accuracyVSAvoidsampling and processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The encoder uses feedback by sampling the input signal at multiple specific time points (including during and after the hold portion) and using these samples to determine the actual voltage level transitions. This feedback mechanism allows the encoder to compensate for jitter by verifying the true signal state rather than relying on a single potentially inaccurate sampling point, improving measurement precision through iterative verification.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4191883A1Circuitry for encoding a bus signal and associated methods
Publication Date: 2023.06.07 NXP BV
  • EP4191883A1 patent drawingFigure 1~2
  • EP4191883A1 patent drawingFigure 3~4
  • EP4191883A1 patent drawingFigure 5~6

AI summary

An apparatus comprising an encoder (212) is configured to: detect a first edge in the input signal and, in response, provide a pulse generation sequence comprising the encoder being configured to: generate, in the output signal, a first pulse, wherein the first pulse is provided over first and second minimum time periods irrespective of an edge subsequent the first edge being present in the input signal; and obtain a first sample of the input signal; and obtain a second sample at an end of the first pulse; and if the first sample and the second sample are indicative of different voltage levels, generate a second pulse; or if the first and second sample and the same maintain the voltage level in the output signal.