Bus Encoding Using On-Chip Memory for Power Reduction
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Solution Overview
Problem
Current system-on-chip (SoC) applications face challenges in reducing power consumption during data transmission across buses, as existing methods do not effectively address the power usage in bus transactions and memory operations.
Innovation Solution
The implementation of bus encoding using metadata and on-chip memory, where data is compressed and encoded to minimize state transitions and power consumption, with control data stored in on-chip memory to reduce sideband signaling and power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If data is transmitted across buses between components, then data communication is achieved, but power consumption increases
Solution Approach 1:
The patent segments the data transmission system into multiple components: encoding unit, bus interface unit, and decoding unit. The encoding unit divides data into chunks and applies encoding schemes to minimize state transitions, while the bus interface unit manages the actual transmission. This segmentation allows power optimization at the encoding level without compromising overall data transmission functionality.
Solution Approach 2:
The patent changes the parameter of data representation by applying encoding schemes that minimize state transitions. Instead of transmitting raw data, the system transforms data into an encoded format where consecutive values have fewer state changes, directly reducing power consumption during bus transmission while maintaining data integrity.
2Ease of operation
If additional conductors are added for sideband signaling, then control data can be transmitted, but device complexity increases
Solution Approach 1:
The patent merges control data with regular data transmission by using the existing bus infrastructure. Instead of adding separate sideband signaling conductors, the system embeds control information within the data payload or uses existing protocol fields, thereby eliminating the need for additional conductors while maintaining ease of operation.
Solution Approach 2:
The existing bus conductors are made multi-functional by using them for both data transmission and control signaling. The bus interface unit interprets specific patterns or reserved fields within the transmitted data to convey control information, allowing the same physical conductors to serve multiple purposes without increasing device complexity.
Data Source
AI summary
Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of communicating data between an electronic unit (EU) of a system-on-chip (SoC) and a dynamic random access memory (DRAM). The method includes encoding data at the EU. The method includes generating control data for decoding the encoded data at the EU. The method includes directing storage of the encoded data in the DRAM. The method includes directing storage of the control data in an on-chip memory separate from the DRAM, wherein the on-chip memory is on a same chip as the EU.