Bus Error Detection via Hardware Register Threshold Monitoring
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Solution Overview
Problem
Existing methods for detecting and handling errors in bus structures are inefficient, relying on manual analysis by engineers, which is time-consuming, laborious, and unstable, often requiring prolonged service deterioration before issues can be identified and resolved.
Innovation Solution
A computer program product and system that automatically detect errors in bus structures by obtaining error information from hardware registers, determining performance deterioration, and performing failover or resetting hardware devices using backup devices based on error thresholds and recovery histories.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual analysis by engineers is used to detect and handle bus errors, then error detection can be performed, but the process becomes time-consuming, laborious, and unstable
Solution Approach 1:
The patent implements preliminary action by pre-configuring multiple hardware registers (error status register, error mask register, error source identifier register, and recovery history register) that continuously monitor and record bus errors before manual intervention is needed. The system proactively detects errors through hardware-level monitoring and automatically performs failover operations when errors are detected, eliminating the need for engineers to wait for service deterioration to file requests. This preliminary automated monitoring and response mechanism resolves the contradiction by providing reliable error detection without time-consuming manual analysis.
2Ease of repair
If manual error analysis and hardware replacement is performed, then errors can be identified and resolved, but the process is highly dependent on engineer skill level and produces unstable results
Solution Approach 1:
The patent applies self-service by enabling the system to automatically detect, analyze, and resolve bus errors without requiring manual engineer intervention. The hardware registers autonomously monitor error conditions, identify error sources through built-in identification mechanisms, and automatically execute failover operations by switching to backup devices. The recovery history register tracks error patterns and automates the decision-making process for error handling. This self-service mechanism eliminates dependence on engineer skill levels and ensures consistent, stable error handling results, resolving the contradiction between ease of repair and reliability.
3Measurement precision
If engineers manually analyze logs and replace hardware devices to classify errors, then error classification can be achieved, but the process requires prolonged service deterioration and is time-consuming
Solution Approach 1:
The patent replaces the mechanical manual process of log analysis and hardware replacement with an automated electronic system. Hardware registers continuously monitor bus errors at the electrical level, automatically capturing and identifying error sources through electronic comparison and analysis of error status bits. The system electronically determines error locations by analyzing data from multiple hardware registers and automatically triggers failover operations without requiring physical hardware manipulation or manual log review. This substitution of mechanical manual processes with electronic automation achieves precise error location identification while dramatically increasing error detection speed, resolving the contradiction between measurement precision and productivity.
Data Source
AI summary
Embodiments of the present disclosure provide a system, a computer program product and a method for detecting and handling errors in a bus structure by obtaining error information from a plurality of hardware registers associated with a bus; in response to determining that a number of the errors in one or more hardware registers of the plurality of hardware registers exceeds a predetermined threshold, detecting performance of hardware devices corresponding to the one or more hardware registers; and in response to determining performance deterioration of one hardware device in the hardware devices corresponding to the one or more hardware registers, determining that an error occurs in the hardware device.