Bus Error Management via Bridge Transaction Storage
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Solution Overview
Problem
Existing bus error management methods fail to provide adequate identification of error causes during write access transactions, leading to unnecessary microcontroller resets and lack of remedial actions for affected operating systems.
Innovation Solution
A bus error management method that stores first and second characteristics of a write transaction, generates a first interrupt with these characteristics, and transmits them to a management unit, which then generates a second interrupt for the appropriate processing unit based on these characteristics, enabling targeted remedial actions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional bus error management methods are used, then the system structure remains simple, but the ability to identify error causes is insufficient leading to unnecessary resets
Solution Approach 1:
The bridge stores characteristics of the write transaction (such as access restriction level, addressing mode, address) before the error occurs. This preliminary storage of transaction information enables precise error cause identification when an error happens, without requiring complex real-time analysis structures.
Solution Approach 2:
A management unit is introduced as an intermediary between the bridge and processing units. The management unit receives errors from the bridge, analyzes stored characteristics, and generates targeted interrupts to appropriate processing units or operating systems. This intermediary structure improves error identification precision while keeping the overall system architecture manageable.
2Reliability
If traditional error management is used, then the system operates with fewer components, but system resilience decreases due to full microcontroller resets
Solution Approach 1:
The error management mechanism enables differentiated response based on error characteristics. Instead of uniform full resets, the system can apply localized remedial actions such as resetting only affected functional units, reconfiguring specific components, or allowing affected operating systems to handle errors independently. This localised approach improves system resilience by maintaining operational continuity in unaffected areas.
Solution Approach 2:
The system segments error handling by processing unit and operating system. The management unit can generate targeted interrupts to specific processing units or operating systems based on error characteristics, allowing independent error recovery in affected segments while other segments continue normal operation. This segmentation prevents cascading failures and improves overall system reliability.
3Loss of information
If characteristics are stored in the bridge, then error information is readily available, but the bridge complexity increases
Solution Approach 1:
The management unit serves multiple functions: it stores transaction characteristics, receives errors from the bridge, analyzes error causes, generates targeted interrupts, and coordinates remedial actions. By consolidating these functions in a single management unit rather than distributing complexity across the bridge and multiple processing units, the overall system complexity is reduced while maintaining complete error information.
Data Source
AI summary
The present description concerns a bus error management method, wherein one or a plurality of first characteristics of a first write transaction intended for a functional unit and transiting through a bridge, are stored, and wherein in the presence of a bus error sent by the functional unit: one or a plurality of second characteristics linked to said error are stored; the bridge generates a first interrupt that it transmits with said first and second characteristics to a management unit; and the management unit generates at least one second interrupt intended for a processing unit as a function of the first and/or second characteristics.