Transceiver Bus-Hold Circuit for Data Bus Failure Mitigation
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Solution Overview
Problem
Data bus systems face issues with output latch failures, leading to incorrect control values being passed to controlled devices during system failures, causing distortion or damage to data transmitted.
Innovation Solution
A method is introduced where a failure mode value is provided to a transceiver bus-hold circuit, which is passed to an output latch input when no driven values are received, ensuring that a fail-safe or fail-desired value is maintained during idle periods to mitigate transparent failure modes in the data bus system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a data bus system uses output latches to maintain control values during idle periods, then the system can maintain state information, but the latches may enter transparent failure modes and pass incorrect values to controlled devices
Solution Approach 1:
The system proactively places the bus-hold circuit into a known good state before failures occur by continuously monitoring latch transparency. When transparency is detected (indicating potential failure), the system preemptively updates the bus-hold circuit with correct control values, preventing incorrect values from being passed to controlled devices during idle periods
Solution Approach 2:
The system implements a feedback mechanism by monitoring the transparency state of output latches and using this information to control when the bus-hold circuit should be updated. The microprocessor detects latch transparency and accordingly manages the bus-hold circuit to maintain correct values, creating a closed-loop control system that responds to latch state changes
2Reliability
If the system continuously monitors and updates bus-hold circuits to prevent latch failures, then reliability improves, but system complexity and processing overhead increase
Solution Approach 1:
The bus-hold circuit serves as an intermediary component between the data bus and controlled devices. It maintains control values locally and provides them to controlled devices independently of the microprocessor's direct control, reducing the need for continuous microprocessor intervention and simplifying the overall control architecture while improving reliability
Solution Approach 2:
The bus-hold circuit performs self-service by automatically maintaining control values on the data bus during idle periods without requiring continuous microprocessor commands. The circuit autonomously holds the last valid control value, reducing processing overhead and simplifying the control logic required for failure mitigation
Data Source
Figure 1~2
AI summary
A data bus system includes a processor (20) having a data output and a transceiver (50) connecting the data output to a data bus. The transceiver includes a bus-hold circuit (52) configured to maintain a latest value of the data output. At least one output latch (60) connects the data bus to at least one corresponding controlled system (30).