Bus Interface System Power Extraction via PWM
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Solution Overview
Problem
Digital bus interface systems face inefficiencies due to the need for multiple bus lines between master and slave ICs, which occupy space and introduce noise, while also requiring separate power supply lines, making them spatially inefficient and prone to noise interference.
Innovation Solution
A bus interface system that uses a single bus line for both data transmission and power supply, employing pulse width modulation (PWM) waveforms, edge detection circuits, reverse current detection circuits, and field effect transistors (FETs) to manage power extraction and noise suppression, allowing the slave IC to store power from the data signal and isolate it during low states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bus lines are provided for data transmission and separate power supply lines are used, then data communication reliability is improved, but spatial efficiency deteriorates and noise interference increases
Solution Approach 1:
The patent combines data transmission and power delivery into a single bus line by superimposing PWM data signals on top of the power supply voltage. The master IC modulates the bus line voltage with PWM waves carrying data, while the slave IC extracts both power and data from the same line through voltage level detection and rectification circuits, thereby reducing the number of physical connections required.
Solution Approach 2:
The single bus line serves multiple functions simultaneously: it provides power supply voltage to the slave IC, transmits digital data through PWM modulation, and enables bidirectional communication through voltage level transitions. This multi-functional use of a single line eliminates the need for separate power and data lines.
2Reliability
If multiple bus lines are provided for data transmission and separate power supply lines are used, then data communication reliability is improved, but noise interference increases
Solution Approach 1:
The patent combines data transmission and power delivery into a single bus line by superimposing PWM data signals on top of the power supply voltage. The master IC modulates the bus line voltage with PWM waves carrying data, while the slave IC extracts both power and data from the same line through voltage level detection and rectification circuits, thereby reducing the number of physical connections required.
Solution Approach 2:
The patent converts the potentially harmful voltage fluctuations and transitions on the bus line into useful data signals. The slave IC's edge detection circuit identifies rising and falling edges of the PWM waveform to decode data, while the rectification circuit converts these same voltage transitions into usable power, transforming what could be noise into beneficial signals.
3Area of stationary object
If a single bus line is used for both data and power transmission, then spatial efficiency is improved, but power extraction control complexity increases
Solution Approach 1:
The patent employs PWM (pulse width modulation) waveforms with regular periodic transitions between high and low states. These periodic voltage transitions provide clear timing references for the slave IC to synchronize power extraction and data sampling operations, simplifying the control logic despite the dual-function requirement.
Solution Approach 2:
The slave IC includes edge detection circuits that monitor bus line voltage transitions and generate control signals based on detected edges. This feedback mechanism allows the slave IC to autonomously synchronize its power extraction and data sampling operations with the incoming PWM signals, reducing the need for complex external control logic.
4Area of stationary object
If a single bus line is used for both data and power transmission, then spatial efficiency is improved, but time efficiency may deteriorate
Solution Approach 1:
The patent employs PWM (pulse width modulation) waveforms with regular periodic transitions between high and low states. These periodic voltage transitions provide clear timing references for the slave IC to synchronize power extraction and data sampling operations, simplifying the control logic despite the dual-function requirement.
Solution Approach 2:
The bus line maintains continuous power delivery through the PWM waveform, with the slave IC continuously extracting power during both high and low states through rectification. Data transmission also occurs continuously through the PWM modulations, ensuring no idle time for either power or data functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the number of bus lines required, enhances time efficiency, and maintains a low noise level by effectively using a single bus line for both data and power transmission, improving spatial efficiency and reducing noise interference.
Implementation Method 1
The slave IC includes a supply capacitor to store power from the data signal on the bus line and provide a supply voltage to the slave IC
Implementation Method 2
When the bus line is in the low state, the supply capacitor is isolated from the bus line. When the bus line is in the high state, the supply capacitor is allowed to extract power from the data signal on the bus line
Data Source
AI summary
The present disclosure relates to a bus interface system including a bus line, master integrated circuitry (IC), and slave IC. The master IC is coupled to the bus line and configured to transmit the data signal to the slave IC through the bus line. The slave IC is coupled to the bus line so as to receive the data signal from the master IC and includes a supply capacitor, which is configured to store power from the data signal and provide a supply voltage to the slave IC. When the bus line is in the low state, the supply capacitor is isolated from the bus line. When the bus line is in the high state, the supply capacitor is allowed to extract power from the data signal on the bus line.


