Interface Device for Bus Data Exchange via Segmented Control

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Solution Overview

Problem

Existing interface devices in automation technology struggle to keep pace with the high speed demands of payload data exchanges between field buses and backplane bus systems, often requiring buffers to ensure data consistency but falling short in optimizing data transfer speed and reliability.

Innovation Solution

An interface device with a control device connected to a list storage device, utilizing a data structure with memory offsets and indices for byte-by-byte write access coordination, and employing semaphores for data consistency, along with dual transfer memories and buffers to manage data exchange between field bus and backplane bus systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If buffers are used to ensure data consistency between field bus and backplane bus systems, then data consistency is improved, but data transfer speed deteriorates

Engineering Contradiction:
Improvedata consistencyVSAvoiddata transfer speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The interface device is segmented into distinct functional units: a field bus interface unit for the first bus system, a backplane bus interface unit for the second bus system, and a data transfer device with transfer memory. This segmentation allows each unit to operate independently at its optimal speed while maintaining data consistency through coordinated access control, resolving the contradiction between using buffers for consistency and maintaining transfer speed.

Inventive Principle:
Principle #1Segmentation

2Reliability

If byte-by-byte write access coordination is implemented, then data consistency is improved, but device complexity increases

Engineering Contradiction:
Improvedata consistencyVSAvoidcoordination mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A control device acts as an intermediary between the field bus interface unit and the backplane bus interface unit, coordinating write accesses to the data transfer device. The control device manages the byte-by-byte coordination through a standardized interface, simplifying the overall system architecture while ensuring data consistency. This intermediary approach reduces complexity compared to direct peer-to-peer coordination between interface units.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dual transfer memories with buffers are employed, then data consistency is improved, but loss of time increases

Engineering Contradiction:
Improvedata consistencyVSAvoiddata exchange time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The interface device dynamically switches between the first transfer memory and the second transfer memory based on operational requirements. The field bus interface unit and backplane bus interface unit can access different transfer memories simultaneously, enabling parallel operations. This dynamic allocation eliminates the time loss associated with static buffer configurations while maintaining data consistency through coordinated access control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9274993B2Interface device and method for consistently exchanging data
Publication Date: 2016.03.01 SIEMENS AG
  • US9274993B2 patent drawing
  • US9274993B2 patent drawing
  • US9274993B2 patent drawing

AI summary

An interface device for exchanging data between a first bus system and a second bus system, wherein an input/output device is connectable to the second bus system and within the input/output device includes an addressable slot and an addressable subslot for output or acceptance of input/output data to optimize the consistent exchange of the data between the bus systems. A data transfer device including a transfer memory is connected via the control device and a list storage device in which a data structure for addressing the data for the input/output device is stored, and wherein the data structure is predetermined for a plurality of subslots in a telegram format of the telegrams of the first bus system.