Bus Inversion Control Signal for Memory Power Reduction
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Solution Overview
Problem
Current memory systems face challenges in reducing power consumption during data bus inversion, as adding dedicated pins and buffers increases device footprint and complexity, and is incompatible with existing protocols.
Innovation Solution
Repurposing an inactive control signal during access operations to indicate data inversion, allowing for minimal footprint and protocol changes, by using a bidirectional control signal controlled by either the system-level or local controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If dedicated pins and buffers are added to support data bus inversion, then power consumption is reduced, but device footprint and complexity increase
Solution Approach 1:
The patent applies multi-functionality by making the write enable signal serve dual purposes: it enables command reception during access operations and simultaneously indicates data inversion state during data transfer operations. This eliminates the need for dedicated inversion indication pins and buffers, reducing device footprint and complexity while maintaining power consumption benefits
Solution Approach 2:
The system uses its existing control infrastructure (write enable signal and buffer) to provide the inversion indication function without requiring external dedicated components. The existing buffer's state (enabled or disabled) self-indicates whether data inversion is active, eliminating the need for separate indication hardware
2Loss of energy
If dedicated pins and buffers are added to support data bus inversion, then power consumption is reduced, but compatibility with existing protocols is lost
Solution Approach 1:
The write enable signal is repurposed to serve multiple functions across different operational modes: it enables command reception during access operations and indicates data inversion during data transfer operations. This approach maintains compatibility with existing protocols that recognize the write enable signal, while adding the inversion indication capability without requiring protocol modifications
Solution Approach 2:
The function of the write enable signal dynamically changes based on the operational phase: during access operations it enables command reception, while during data transfer operations it indicates data inversion state. This dynamic repurposing allows the system to maintain protocol compatibility while providing enhanced functionality
3Loss of energy
If additional hardware is added for data bus inversion, then power consumption is reduced, but device footprint increases
Solution Approach 1:
The patent makes existing hardware components serve multiple functions: the write enable buffer serves both as a command enable mechanism and as an inversion state indicator. This eliminates the need for dedicated inversion indication pins and buffers, thereby reducing device footprint while maintaining the power consumption benefits of data bus inversion
Data Source
AI summary
Methods, systems, and devices that support signaling mechanisms for bus inversion are described. A control signal that supports transferring information from a first controller to a second controller via a bus may also be configured to indicate whether or not data that is communicated over the bus is inverted. The control signal may be a control signal that enables reception of control information at the second controller. The control signal may be controlled by the first controller when data is transmitted to the second controller and may be controlled by the second controller when data is transmitted to the first controller.