Bus-Invert ECC Encoding for Fewer Data Bus Lines
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Solution Overview
Problem
Existing bus-invert encoding techniques require additional lines for transmitting invert-indication information, increasing complexity and power consumption, especially for buses with more bits.
Innovation Solution
A data bus system that uses a bus-invert encoder, a virtual bit-group generator, and an ECC encoder to convert invert-indication information into a virtual bit-group, allowing ECC to handle invert-indication information without additional lines, using a predetermined code mapping and error-checking-and-correction scheme to ensure reliable transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If bus-invert encoding is used to reduce data bus power consumption, then power consumption is reduced, but additional lines are required to transmit invert-indication information
Solution Approach 1:
The patent merges the invert-indication information with the existing ECC check bits by using the ECC encoding mechanism to transmit both data integrity information and bus-invert control information through the same transmission lines. The virtual bit-group generated from invert-indication information is integrated into the ECC encoding process, allowing dual functionality without additional physical lines.
Solution Approach 2:
The ECC check bits are given a dual function: they continue to provide error detection and correction capabilities while simultaneously carrying the bus-invert indication information. This multi-functional use of existing ECC infrastructure eliminates the need for separate transmission lines for invert-indication.
2Use of energy by moving object
If bus-invert encoding is used to reduce data bus power consumption, then power consumption is reduced, but transmission reliability may be compromised
Solution Approach 1:
The patent incorporates error-checking and correction capabilities through ECC encoding before data transmission. By generating ECC codes for the virtual word (which includes encoded data and virtual bit-group representing invert-indication information), the system prepares error protection in advance, ensuring that even if errors occur during transmission, the original information can be recovered.
Solution Approach 2:
The ECC decoding process provides feedback verification of the received data and invert-indication information. The decoder checks the received virtual word against the ECC code, and if errors are detected, correction is performed before the invert-indication information is used to control the output data, thus maintaining reliability.
3Reliability
If ECC encoding is used to ensure transmission reliability, then reliability is improved, but the number of error-check bits increases
Solution Approach 1:
The patent combines the invert-indication information with the ECC check bits by integrating the virtual bit-group (generated from invert-indication information) into the ECC encoding process. This merging allows the same ECC infrastructure to serve dual purposes: error detection/correction and bus-invert control, without increasing the total number of transmission bits.
Data Source
AI summary
The present application relates to a data bus system, its encoder/decoder and encoding/decoding method. The data bus encoder comprises: a bus-invert encoder for generating encoded data and invert-indication information by performing bus-invert encoding on data according to a predetermined bus-invert encoding scheme; a virtual bit-group generator for converting the invert-indication information into a virtual bit-group according to a predetermined code mapping; and an error-checking-and-correction encoder for generating an error-checking-and-correction code for a virtual word according to a predetermined error-checking-and-correction encoding scheme, wherein the number of error-checking bits is more than the number of error-correction bits at least by one in the predetermined error-checking-and-correction encoding scheme, the mapping is such that the Hamming distance between any possible value of the virtual bit-group and a reference virtual bit-group which cannot be converted into under the mapping is a fixed value, and not greater than the number of error-correction bits of the error-checking-and-correction encoding scheme, and the virtual word includes the data to be output, the virtual bit-group corresponding to the data, and at least one padding bit of a fixed value, which is configured as required by the error-checking-and-correction encoding scheme.


