Bus Lock Assistance Logic for Microcode Performance

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Solution Overview

Problem

The execution of special micro-code to handle bus locks in computing systems results in performance degradation, as it is triggered even when a bus lock does not occur, affecting system performance and complexity in software design.

Innovation Solution

Implementing a methodology and apparatus for bus lock assistance that triggers specific procedures only upon the occurrence of a bus lock, using logic circuitry and control registers to determine if a locked instruction requires bus lock assistance, and executing special handling procedures such as raising flags or analyzing system states to avoid bus locks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If special micro-code is executed to handle bus locks, then system reliability is improved, but system performance deteriorates

Engineering Contradiction:
Improvesystem reliabilityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a dynamic approach by conditionally executing bus lock assistance micro-code only when specific conditions are met (bus lock detected, assistance enabled). The system transitions from static always-on handling to dynamic on-demand handling, improving performance while maintaining reliability when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies local quality by enabling bus lock assistance selectively for specific threads or contexts through control registers. Not all threads receive bus lock assistance by default, allowing the system to optimize performance for threads that don't require it while maintaining reliability for those that do.

Inventive Principle:
Principle #3Local quality

2Reliability

If bus lock assistance is always enabled, then system reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic control through control registers that allow runtime configuration of bus lock assistance behavior. The system can adapt its complexity level based on operational needs, enabling reliability when required while reducing overhead when not needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements self-service mechanisms where the system automatically detects bus lock conditions and selectively activates assistance only when necessary. The control logic monitors system state and autonomously decides when to invoke complex handling procedures, reducing the need for permanent complex infrastructure.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10216650B2Method and apparatus for bus lock assistance
Publication Date: 2019.02.26 INTEL CORP
  • US10216650B2 patent drawing
  • US10216650B2 patent drawing
  • US10216650B2 patent drawing

AI summary

A method is described that includes detecting that an instruction of a thread is a locked instruction. The instruction also includes determining that execution of said instruction includes imposing a bus lock. The instruction also include executing a bus lock assistance function in response to said determining, said bus lock assistance function including a function associated with said bus lock other than implementation of a bus lock protocol.