Bus Master Transceiver Channel Architecture for Flexible Communication
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Solution Overview
Problem
Existing serial master-slave communication systems lack flexibility in expanding communication capabilities without compromising existing advantages.
Innovation Solution
A bus master system with a transceiver circuit and channel architecture that enables flexible data transmission and reception through dedicated communication channels, using a receive memory area and data select circuit to manage data packets and identifiers, allowing for independent operation from software programs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the communication possibilities within a serial master-slave communication system are expanded, then the flexibility of communication is improved, but the system complexity increases
Solution Approach 1:
The master device is divided into multiple independent channels, each capable of independent operation. Each channel has its own receive memory area and can handle data packets independently, allowing the system to expand communication capabilities by activating additional channels without complicating the overall system architecture.
Solution Approach 2:
Each channel in the master device is designed with universal functionality to handle different types of data packets and communicate with various slaves. The channels can be configured for different purposes while maintaining the same basic operational structure, enabling flexible communication expansion without increasing system complexity.
2Productivity
If receive data is stored in a buffer for later processing, then data transmission efficiency is improved, but the device complexity increases
Solution Approach 1:
The receive memory area is integrated directly into each channel's hardware structure, combining the buffering function with the data reception and processing functions. This merging eliminates the need for separate buffer management software and reduces overall device complexity while maintaining high data transmission efficiency.
Solution Approach 2:
Each channel autonomously manages its own receive memory area without requiring external software intervention. The channel can independently store, retrieve, and process receive data, enabling efficient data transmission while reducing the complexity associated with centralized buffer management.
3Reliability
If software programs are prevented from accessing the receive memory area during system operation, then system stability is improved, but the ease of operation decreases
Solution Approach 1:
The receive memory area is extracted from the general software-accessible memory space and dedicated exclusively to hardware-controlled data reception. This separation ensures system stability by preventing software from interfering with active data reception, while the channel interface provides controlled access when needed.
Data Source
AI summary
A master of a bus system for process control with one slave and a bus. A transceiver circuit transmits and receives for process control by data packets. A channel has a receive memory area. The transceiver circuit is set up to write the receive data of a data packet received via the bus into the receive memory area. The channel has at least one selection circuit, an output of the selection circuit being connected to the transceiver circuit. The selection circuit has a first input for selecting initial data. The selection circuit has a second input, the second input being connected to the receive memory area, and the selection circuit is configured to select the transmit data from the initial data and/or the data written into the receive memory area and to output the transmitted data to the transceiver circuit for a data packet to be transmitted.