Serial Bus Node Addressing via Current Measurement
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Solution Overview
Problem
Existing serial data bus systems face limitations in addressing a large number of bus nodes due to voltage drop issues, resistance values, and current constraints, particularly in LIN bus systems, where the number of addressable nodes is limited, and the addressing process is inefficient, leading to long auto-addressing times and potential overload of the bus master.
Innovation Solution
A method where each addressing bus node measures the bus current and feeds an addressing current into the bus line, using a current measuring device to detect and control the addressing current, allowing for efficient identification and addressing of nodes without exceeding the maximum bus current, thereby reducing resistance values and enabling more nodes to be addressed while maintaining system stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the resistance of the bus shunt is reduced to minimize voltage drop, then the voltage level across the bus shunt decreases, but the ability to detect addressing bus nodes becomes insufficient
Solution Approach 1:
The patent changes the measurement parameter from voltage level to current level. Instead of measuring voltage across the bus shunt (which requires high resistance and causes voltage drop), the system measures the addressing current fed into the bus line. This allows the bus shunt resistance to be minimized for energy efficiency while maintaining detection capability through current measurement.
2Measurement precision
If the addressing current is increased to maximize the voltage level across the bus shunt, then the detection capability improves, but the total current drawn by the bus master exceeds the specified limit of 40mA
Solution Approach 1:
The patent extracts the current measurement function from the bus master and places it at each addressing bus node. Each bus node measures its own addressing current locally, eliminating the need for the bus master to draw high currents for detection purposes. This reduces the bus master's current consumption to well below the 40mA limit while maintaining detection capability.
3Adaptability or versatility
If the number of addressing bus nodes is increased, then the system versatility improves, but the auto-addressing time increases due to the sequential nature of the addressing process
Solution Approach 1:
The patent implements a self-service addressing mechanism where each bus node autonomously determines its own address by measuring the addressing current it feeds into the bus line. This eliminates the need for sequential addressing by the bus master, allowing all nodes to be addressed simultaneously and reducing auto-addressing time regardless of the number of nodes.
4Object-affected harmful factors
If the bus shunt resistance is minimized to achieve compliance with LIN bus standards, then the EMC behavior improves, but the voltage level for robust auto-addressing decreases
Solution Approach 1:
The patent substitutes the voltage-based detection mechanism with a current-based measurement mechanism. This allows the use of low-resistance bus shunts for EMC compliance while maintaining reliable auto-addressing through current measurement, which is not affected by the reduced voltage levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the efficient auto-addressing of multiple bus nodes within the serial data bus system, reducing auto-addressing time, minimizing resistance, and preventing bus master overload, while ensuring robustness and compliance with LIN bus standards.
Implementation Method 1
each addressing bus node which has not yet been addressed measures by means of a current measuring device connected to the bus line the bus current flowing through it as the sum of the quiescent currents of all bus nodes arranged upstream and its own addressing current and the addressing currents of all addressing bus nodes arranged upstream but not yet addressed
Data Source
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AI summary
The invention relates to a bus node capable of carrying out a method according to the invention for assigning bus addresses to bus nodes of a serial data bus system. The method for assigning bus addresses to bus nodes of a serial data bus system is carried out using bus shunt resistors (R2) in the individual bus nodes (SLx) of the data bus system during an assignment period. After carrying out the method for assigning bus addresses to the bus nodes of the serial data bus system during the assignment period, an operating period follows. The bus node includes such a bus shunt resistor (R2). The bus node is characterized by a bus shunt bypass switch (S4) which is open before a bus address is assigned to the bus node during the assignment period and which is closed after a bus address is assigned to the bus node during the assignment period and which remains closed during the operating period.