Over Voltage Protection for Bus Communication Lines
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Solution Overview
Problem
Sensitive electronic circuitry connected to a computer peripheral bus is vulnerable to over voltage conditions due to accidental short circuits between communication and power supply contacts, which can damage the circuitry, and existing protection methods either degrade communication speed or are not future-proof against higher power supply voltages from external devices.
Innovation Solution
A circuit using a transistor (such as a MOSFET) connected between the I/O port and communication contact, with a control circuit maintaining a fixed gate voltage independent of the power supply voltage, ensuring the I/O port is protected from over voltages, even when connected to external devices with higher power supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a clamping circuit is added to protect against over voltage, then the I/O port is protected from over voltage damage, but the parallel capacitance on the communications contact increases, degrading the maximum communication speed
Solution Approach 1:
The patent introduces a series resistance element as an intermediary component between the communications contact and the I/O port. This series resistance limits the current during over voltage events without significantly affecting normal communication signals, thereby providing protection while maintaining communication speed. The series resistance acts as a mediator that blocks harmful over voltage transients while allowing legitimate communication signals to pass through with minimal attenuation.
2Reliability
If a protection circuit with fixed threshold is used, then the I/O port is protected from over voltage, but the device is not compatible with future external devices that may use higher power supply voltages
Solution Approach 1:
The patent employs dynamic threshold adjustment by using a voltage divider network that scales the protection threshold proportionally with the power supply voltage. Instead of a fixed threshold, the protection circuit adapts its threshold dynamically based on the actual Vbus voltage level. This allows the device to work with both current USB 2.0 devices (5V) and future USB 3.0 devices (12V or higher), as the protection threshold automatically adjusts to match the power supply voltage of connected devices.
3Device complexity
If the gate voltage of the transistor is tied to the power supply contact, then the circuit is simple, but the I/O port is not protected when the power supply voltage exceeds the maximum permissible voltage
Solution Approach 1:
The patent segments the gate voltage control into two independent parts: a reference voltage generation section and a power supply voltage detection section. The reference voltage, which determines the protection threshold, is generated independently from the power supply voltage using a voltage reference circuit. This segmentation allows the protection threshold to remain stable and appropriate even when the power supply voltage varies or exceeds maximum permissible levels, while keeping the overall circuit relatively simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively protects the I/O port from over voltage conditions while maintaining communication speed and ensuring compatibility with future generations of external power sources, preventing damage from accidental short circuits and higher power supply voltages.
Implementation Method 1
the transistor begins to switch into its open circuit state, presenting a high series resistance between the communications contact and the integrated circuit port, thereby preventing the voltage on the integrated circuit port from rising above Vbus
Data Source
AI summary
An electronic device has an I/O port, a bus connector and a transistor that is connected between the I/O port and a communications contact of the bus connector. A control circuit is connected to the transistor to maintain a gate voltage of the transistor independent of power supply voltage on a power supply contact of the connector. Other embodiments are also described and claimed.


