Bus Path Verification for Wiring Space Efficiency
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Solution Overview
Problem
Current wiring design methods for integrated circuits and printed circuit boards face challenges in accurately estimating the area occupied by net groups during global routing, leading to issues such as unwired portions or unnecessary layer usage, especially with increased scales and densities.
Innovation Solution
A method for generating and verifying bus paths in a wiring area to prevent bus wires from crossing, ensuring successful extraction of nets from components, and re-executing path generation for buses where nets are not successfully extracted, using a computer-aided approach with specific storage sections and processing units for determining adequateness and layer assignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the area occupied by net groups is underestimated in global routing, then wiring space efficiency is improved, but unwired portions remain in detailed routing
Solution Approach 1:
The patent performs preliminary action by executing detailed routing verification at the global routing stage. It calculates the actual area required for net extraction by simulating detailed routing operations on each bus path, then uses this verified area information to adjust global routing decisions before final wiring is created, preventing both underestimation and overestimation issues
Solution Approach 2:
The patent implements feedback by using the results of detailed routing verification to feed back into global routing optimization. The system calculates extraction areas, identifies buses with verification failures, and uses this information to re-execute global routing for affected buses, creating a closed-loop system that continuously improves wiring accuracy
2Reliability
If the area occupied by net groups is overestimated in global routing, then net extraction success is improved, but unnecessary layers are used increasing manufacturing cost
Solution Approach 1:
The patent applies partial action by performing detailed routing verification selectively only for buses that fail initial global routing verification, rather than all buses. This partial re-verification approach optimizes area estimation without requiring complete re-routing of all buses, balancing accuracy with manufacturing efficiency
Solution Approach 2:
The patent changes parameters by adjusting the area estimation parameters for specific buses based on verification results. When a bus fails verification, the system modifies its path or layer assignment parameters to achieve successful extraction, rather than uniformly increasing area estimates for all buses, thus avoiding unnecessary layer usage
3Measurement precision
If detailed routing verification is performed for all buses, then net extraction accuracy is improved, but processing time increases
Solution Approach 1:
The patent segments the verification process by dividing buses into different verification groups: buses passing initial global routing verification require no further verification, while failing buses require detailed routing verification. This segmentation allows the system to focus computational resources only where needed, improving accuracy for critical cases while minimizing overall processing time
Data Source
AI summary
A wiring-design aiding method for causing a computer to execute generating paths for buses so that the buses do not cross each other with respect to a wiring area including at least one wiring layer, the paths being represented by corresponding graphics The computer further executes verifying, for each bus, whether wires for nets belonging to the bus are successfully extracted from a component to which the bus is connected; and recording, in the wiring area, graphics representing the nets belonging to a bus for which it is determined in the verification that all the nets belonging to the bus are successfully extracted. The bus-path generation is re-executed with respect to the bus for which it is determined in the verification that at least one of the nets is not successfully extracted.