Off-Chip Bus Protocol Engine for BMC Firmware Updates
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Solution Overview
Problem
The challenge lies in updating a baseboard management controller's (BMC) ASIC to support new bus standards without incurring significant monetary and human resource costs associated with respinning the ASIC or compromising system security by using untrusted third-party components.
Innovation Solution
The solution involves using a message-encapsulating tunneling interface to communicate control data to an off-chip bus protocol engine on a separate semiconductor package, allowing firmware modifications to update the ASIC's functionality without hardware changes, thereby enabling support for new communication interfaces through a trusted programmable logic device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the ASIC is respinned to support new bus standards, then the BMC can support new communication protocols, but significant monetary and human resource costs are incurred
Solution Approach 1:
The system separates the bus protocol engine from the ASIC by placing it on a separate semiconductor package. This segmentation allows the ASIC to remain unchanged while the protocol engine is updated independently to support new communication protocols, eliminating the need for costly ASIC respinning.
Solution Approach 2:
A message-encapsulating tunneling interface acts as an intermediary between the ASIC and the off-chip bus protocol engine. This intermediary enables communication and control data transfer without requiring modifications to the ASIC itself, allowing protocol updates through firmware changes alone.
2Adaptability or versatility
If third-party components are used to update BMC functionality, then new communication protocols can be supported, but system security is compromised
Solution Approach 1:
The message-encapsulating tunneling interface serves as a trusted intermediary that maintains security boundaries. It allows the ASIC to communicate with external protocol engines while enforcing access control and data protection, preventing security compromises even when using external components.
3Ease of manufacture
If firmware modifications are used to update ASIC functionality, then hardware changes are avoided, but the ASIC must be directly modifiable
Solution Approach 1:
The bus protocol engine functionality is extracted from the ASIC and placed on a separate semiconductor package. This extraction allows firmware modifications to update protocol support without requiring changes to the ASIC hardware or its core firmware, achieving functional updates through independent engine updates.
4Speed
If the bus protocol engine is integrated on the same chip as the ASIC, then communication efficiency is improved, but the ASIC cannot be updated without respinning
Solution Approach 1:
The system segments the architecture into an ASIC and a separate bus protocol engine on different semiconductor packages. This segmentation enables independent updating of the protocol engine while maintaining efficient communication through the message-encapsulating tunneling interface, resolving the conflict between integration benefits and update flexibility.
Data Source
AI summary
A processor executes firmware to write control data describing transfer descriptors for a bus protocol engine to an address that is associated with a transfer descriptor buffer for the bus protocol engine. The bus protocol engine performs an operation according to the transfer descriptors with a slave device; the processor is part of a first semiconductor package; the bus protocol engine is part of a second semiconductor package other than the first semiconductor package; and the address corresponds to a memory of the second semiconductor package. A first physical interface of the first semiconductor package communicates with a second physical interface of the second semiconductor package to direct the control data to the memory.