Differential Bus Receiver Circuit for Wide Common-Mode Tolerance

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Solution Overview

Problem

Existing differential two-wire bus reading devices, such as those for CAN bus, are rendered inoperative by variations in common-mode potential, particularly due to electrostatic discharges, which can range from -40 V to +40 V.

Innovation Solution

A device comprising first and second terminals connected to a differential two-wire bus, with identical resistive divide bridges and NMOS/PMOS transistors configured to determine the binary state of the bus from currents flowing through specific transistors, ensuring robustness against common-mode potential variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If known reading circuits are used in differential two-wire buses, then the device can read digital data from the bus under normal conditions, but the device becomes inoperative when common-mode potential varies due to electrostatic discharges

Engineering Contradiction:

Improvedevice functionalityVSAvoidcommon-mode potential variation

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies equipotentiality by introducing a common-mode voltage rejection mechanism through differential sensing. The reading circuit measures only the differential voltage between the two bus conductors while rejecting common-mode potential variations. This is achieved by using differential amplifiers or balanced bridge circuits that respond only to voltage differences, not absolute potential levels, thereby maintaining functionality across wide common-mode voltage ranges from -40V to +40V.

Inventive Principle:

Principle #12Equipotentiality

Solution Approach 2:

The patent uses an intermediary differential sensing circuit that decouples the reading device from direct exposure to harmful common-mode potential variations. The differential amplifier acts as an intermediary that translates the differential signal while blocking the common-mode component, protecting the subsequent digital logic from ESD-induced voltage excursions.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If protective measures are added to make the reading circuit robust against common-mode potential variations, then reliability improves, but device complexity increases

Engineering Contradiction:

Improverobustness to common-mode potential variationsVSAvoidcircuit structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the reading circuit into distinct functional blocks: a differential sensing stage, a common-mode rejection stage, and a digital output stage. This segmentation allows each block to be optimized independently - the differential stage captures the signal, the rejection stage filters common-mode noise, and the output stage provides digital logic levels. This modular approach manages complexity while achieving robustness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent employs parameter changes by adjusting the gain and offset of the differential amplifier to optimize performance across varying common-mode conditions. The circuit dynamically adapts its operating parameters (such as reference voltages and amplification factors) to maintain accurate differential voltage measurement regardless of the common-mode potential level, thereby achieving reliability without excessive complexity.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively maintains device functionality and accurately determines the binary state of the bus even under extreme common-mode potential variations, from -40 V to +40 V, thereby overcoming the limitations of existing devices.

Implementation Method 1

First and second identical resistive divide bridges connected between a reference node and, respectively, first and second nodes respectively coupled with the first and second terminals

Methodology Applied

Scientific EffectVoltage division: Ohm's Law

Implementation Method 2

A reading circuit comprises first and second NMOS transistors having their gates connected to each other and their sources connected to an intermediary node of the second bridge, third and fourth NMOS transistors having their gates connected to each other and their sources connected to a corresponding intermediary node of the first bridge

Methodology Applied

Scientific EffectField effect transistor operation: Electric Field

Data Source

PatentUS20250030577A1Receiver device for two-wire bus

Publication Date: 2025.01.23 STMICROELECTRONICS INT NV

AI summary

A device includes first and second terminals configured to be respectively connected to first and second conductors of a differential two-wire bus. First and second identical resistive dividing bridges are connected between a reference node and respectively first and second nodes. Third and fourth identical resistive dividing bridges are connected between a supply node and respectively the first and second nodes. A reading circuit is configured to determine a binary state of the bus from the currents flowing through transistors of the reading circuit.