Bus-Type Sensor Data Collection System Wiring Simplification

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Solution Overview

Problem

The complexity of wirings in data collection systems increases significantly with the number of sensors, making it cumbersome to manage and power each sensor individually.

Innovation Solution

A data collection system with a bus-type topology connecting sensor modules and a data collection apparatus, using a clock and enable signal to manage data transmission and power distribution, allowing sensors to function as shift registers and only output data when enabled, reducing the need for individual wirings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If individually interconnecting wiring switch and respective sensors with multiple wirings for each sensor, then data collection capability is achieved, but wiring complexity becomes massive when number of sensors is large

Engineering Contradiction:
Improvewiring complexityVSAvoidnumber of wirings
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

Multiple separate wirings for each sensor (data signal wiring and power feed wiring) are merged into a single shared bus line. The patent connects all sensors to a common bus line that carries both data signals and power, eliminating the need for individual wiring pairs for each sensor and dramatically reducing overall wiring complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bus line is designed to serve multiple functions simultaneously: it acts as both a data communication medium and a power distribution network. This multi-functional design allows a single wiring infrastructure to replace what would traditionally require separate data and power wirings for each sensor.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If sequentially acquiring data from many sensors, then data management is simplified, but individual wiring connections are still required for each sensor

Engineering Contradiction:
Improveconnection structureVSAvoidwiring setup
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The patent merges individual sensor connections into a shared bus topology where all sensors connect to a common communication line, simplifying the physical connection structure while maintaining sequential data acquisition capabilities through software or controller logic.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If using multiple wirings for each sensor including power feed and data signal, then reliable data collection is achieved, but wiring becomes troublesome when sensors are numerous

Engineering Contradiction:
Improvedata collection reliabilityVSAvoidwiring management
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent combines power feed and data signal transmissions into a single bus line, reducing wiring management complexity while maintaining reliable data collection through protocols that separate power and data communication functions within the shared medium.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bus line acts as an intermediary medium that facilitates both power distribution and data communication between the controller and multiple sensors, replacing direct point-to-point connections with a shared communication infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3236444B1Data collection system
Publication Date: 2020.09.16 YOKOGAWA ELECTRIC CORP
  • EP3236444B1 patent drawingFigure 1
  • EP3236444B1 patent drawingFigure 2
  • EP3236444B1 patent drawingFigure 3

AI summary

A data collection system includes a plurality of sensor modules each provided with a sensor unit, and a data collecting device. The data collecting device (200) is provided with: a clock output unit (201) which outputs a clock signal; an enable signal output unit (202) which outputs to a prescribed sensor module (100) an enable signal at intervals equal to or greater than the number of clock signals corresponding to the number of sensor modules (100); a counter (203) which counts the number of clock signals; and a sensor signal input unit (205) into which data output by the sensor modules (100) is input via a bus line, and which records said data in association with the count value. Using the clock signal as a trigger, each sensor module (100) functions as a shift register feeding the enable signal to the subsequent stage sensor module (100), and each sensor module (100) outputs output data from the sensor unit (110) in said sensor module (100) to the sensor signal input unit (205) only when the enable signal has been fed to said sensor module (100).