Bus Transaction Signature Generation for Error Detection

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Solution Overview

Problem

Existing methods for detecting errors in computer program execution, such as bit inversions, are either complex and costly or fail to detect errors that do not alter results, and require multiple processors or instrumentation of executable code, limiting their effectiveness and applicability.

Innovation Solution

A device and method that generate signatures for both instructions and data streams during program execution using hardware means independent of the calculation unit, allowing for precise error detection without modifying the execution flow, and enabling comparison of execution streams on a single or multiple calculation units without additional synchronization mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lockstep method is used to synchronously duplicate execution flow, then error detection capability is improved, but device complexity and cost increase due to requiring multiple processors

Engineering Contradiction:
Improveerror detection capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a simplified copy of the execution flow by observing bus transactions (addresses and data) between memory and processing unit, rather than copying the entire processor. This observed stream is then used to generate a signature that represents the execution flow, achieving error detection without the complexity of multiple processors

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an intermediary observation mechanism that monitors bus transactions between memory and processing unit. This intermediary captures the essential execution flow information without requiring direct access to or duplication of the processor internals, simplifying the overall system architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If asynchronous duplication is performed on a single execution unit, then device complexity is reduced, but error detection capability deteriorates because intermediate errors that do not alter results cannot be detected

Engineering Contradiction:
Improvedevice complexityVSAvoiderror detection capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent performs preliminary observation and signature generation during the execution flow itself, rather than waiting for final results. By continuously generating a signature from observed bus transactions throughout execution, the system can detect intermediate errors even if they don't ultimately alter the final results

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical approach of running multiple physical processors with a computational approach using a single processor that observes its own execution flow through bus transactions and generates signatures. This substitution maintains error detection capability while reducing hardware complexity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If code instrumentation is performed to generate signatures, then error detection is enabled, but ease of operation deteriorates due to requiring modification of executable code

Engineering Contradiction:
Improveerror detection capabilityVSAvoidease of operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent extracts the signature generation functionality from the executable code itself and places it in the hardware observation mechanism. Instead of embedding signature generation instructions within the code, the system observes the code's execution through bus transactions and generates signatures externally, eliminating the need for code modification

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If multiple processors are used for process duplication, then error detection capability is improved, but adaptability deteriorates because it precludes comparison on machines with single execution unit

Engineering Contradiction:
Improveerror detection capabilityVSAvoidadaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal error detection mechanism that can operate on any system with a processing unit and memory, regardless of whether it has one or multiple processors. The observation-based signature generation works by monitoring bus transactions, which is a universal interface in computer systems, making the solution adaptable to various architectures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2836913B1Device for generating a signature during execution of a program task, and method for comparing flows of execution
Publication Date: 2019.12.25 SCALEO CHIP
  • EP2836913B1 patent drawingFigure 1~2
  • EP2836913B1 patent drawingFigure 3~4

AI summary

The present invention relates to a device for generating at least one signature during execution of a program task on a calculation system. At least one value stream passes via bus between a memory and a calculation unit of said system during execution of said task. The device includes a means (131, 132, 133, 134, 135) configured so as to observe at least a plurality of said values during said execution and so as to calculate and store a signature on the basis of the observed values. The invention is in particular of use for the detection of errors in the execution of computer programs.