Interface Circuit Bus Speed Switching for Wireless Interference Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Modern bus specifications, such as USB 3.0, operate at high speeds that cause significant interference to wireless connections by leaking power at frequencies used by wireless devices, leading to degraded signal quality and high bit error rates.

Innovation Solution

Implementing a method and interface circuit that allows electronic apparatuses to communicate at a nonstandard speed, different from the compliant standard speed, to mitigate interference by configuring a speed switch from standard SuperSpeed to a lower nonstandard speed, thereby reducing power leakage at wireless connection frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If bus signaling operates at standard SuperSpeed (5 Gbps), then data transmission speed is improved, but power leakage at wireless connection frequencies increases causing interference

Engineering Contradiction:
Improvedata transmission speedVSAvoidpower leakage at wireless frequencies
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent changes the signaling speed parameter from standard SuperSpeed (5 Gbps) to a nonstandard speed (e.g., 2.5 Gbps or other reduced rates). This parameter modification shifts the power spectrum density away from wireless connection frequencies (particularly 2.4 GHz), reducing interference while maintaining adequate data transmission capability. The interface circuit is configured to operate at these alternative speeds that are not compliant with standard USB specifications.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If bus signaling speed is reduced to nonstandard speed, then power leakage at wireless frequencies is reduced, but data transmission speed decreases

Engineering Contradiction:
Improvepower leakage at wireless frequenciesVSAvoiddata transmission speed
Core Design Contradiction:
Object-generated harmful factorsVSSpeed

Solution Approach 1:

The patent modifies the signaling speed parameter to nonstandard values that balance interference reduction with acceptable data transmission performance. By selecting specific reduced speeds (e.g., 2.5 Gbps instead of 5 Gbps), the solution achieves sufficient power spectrum separation from wireless frequencies while maintaining practical data transfer rates for many applications.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If nonstandard speed signaling is implemented, then wireless connection performance is improved, but compatibility with standard bus specification is reduced

Engineering Contradiction:
Improvewireless connection performanceVSAvoidcompatibility with bus specification
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by making the interface circuit selectively adaptable - it can operate in standard-compliant mode for compatibility scenarios and nonstandard mode for wireless interference mitigation. The circuit is configured with specific parameters (e.g., reduced signaling speeds like 2.5 Gbps) that are applied locally when wireless connection protection is needed, while maintaining ability to use standard speeds when compatibility is the priority.

Inventive Principle:
Principle #3Local quality

4Object-generated harmful factors

If speed switching from standard to nonstandard is configured, then interference mitigation is enabled, but device complexity increases

Engineering Contradiction:
Improveinterference to wireless connectionVSAvoidinterface circuit configuration
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent implements dynamic operation by enabling the interface circuit to switch between standard and nonstandard signaling speeds based on operational requirements. The circuit is configured to adapt its signaling rate dynamically - using standard SuperSpeed when wireless interference is not a concern, and switching to reduced nonstandard speeds when wireless connection protection is needed. This dynamic capability allows a single circuit design to handle multiple operational modes.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10275387B2Method and associated interface circuit for mitigating interference due to signaling of a bus
Publication Date: 2019.04.30 MEDIATEK INC
  • US10275387B2 patent drawing
  • US10275387B2 patent drawing
  • US10275387B2 patent drawing

AI summary

The present invention provides method and associated interface circuit for mitigating interference due to signaling of a bus between two electronic apparatuses. The method may include: via the bus mechanically compliant to a bus specification, communicating and transporting data at a nonstandard speed which is not compliant to the bus specification. The method may further include: before communicating and transporting data at the nonstandard speed, signaling via the bus at a standard speed to configure a speed switching from the standard speed to the nonstandard speed, with the standard speed compliant to the bus specification. For example, the bus specification may be USB specification, the standard speed may be 5 Gbps (SuperSpeed of USB 3.0 specification), and the nonstandard speed may be lower than the standard speed, e.g., 2.5 Gbps, which forms a spectrum notch at a frequency of wireless connection, e.g., 2.4 GHz of Wi-Fi.