Bus Switching Circuit for Memory Signal Reflection Control
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Solution Overview
Problem
In memory systems, unbalanced load capacities lead to signal waveform deterioration due to signal reflection, hindering high-speed operation, and existing countermeasures like stub series termination logic face challenges in substrate space constraints.
Innovation Solution
The memory system incorporates a second substrate portion with bus switching circuits that include switching elements and resistors in series, controlling connections to prevent signal reflection by selectively connecting memories to the bus, thereby maintaining signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stub series termination logic is used to prevent signal reflection, then signal quality is improved, but substrate space is insufficient
Solution Approach 1:
The patent introduces a bus switching circuit as an intermediary component between the memory and the bus. This circuit includes a switching element and a series resistor that act together to prevent signal reflection. The switching element selectively connects or disconnects the memory from the bus, while the series resistor terminates the signal when disconnected, preventing reflection without requiring additional space on the memory substrate.
Solution Approach 2:
The patent implements dynamic control of the connection between memory and bus through a switching element. The switching element can dynamically change the connection state based on whether the memory is being accessed, allowing the system to adapt the termination configuration in real-time. This dynamic approach enables effective signal reflection prevention without permanent additional components on the substrate.
2Device complexity
If unbalanced load capacity is present in memory connected to bus, then device complexity is reduced, but signal waveform deteriorates due to reflection
Solution Approach 1:
The bus switching circuit serves as a mediator that resolves the conflict between unbalanced load capacity and signal quality. The switching element allows selective connection of memories with different load capacities to the bus, while the series resistor in the switching circuit provides termination to prevent reflection. This enables the system to maintain simple, unbalanced memory configurations without compromising signal waveform quality.
Data Source
AI summary
A memory system includes a first substrate including a first signal terminal and a second signal terminal electrically connected to a bus, a first circuit in which a first switching element and a first resistor are connected in series between a first terminal and a second terminal, the first terminal connected to the first signal terminal, a second circuit in which a second switching element and a second resistor are connected in series between a third terminal and a fourth terminal, the third terminal connected to the second signal terminal, a first memory electrically connected to the second terminal, a second memory electrically connected to the fourth terminal, and a controller electrically connected to the bus and configured to control the first and second switching elements.