Isochronous Bus Transceiver Calibration for Duty-Cycle Distortion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In shared bus communications, data conflicts and loss occur due to simultaneous transmissions from multiple devices, leading to signal collisions and unintelligible signals, which worsen as the number of devices increases, and existing solutions either require additional circuit board space or increase the complexity of smaller form factors.
Innovation Solution
Calibrating devices on the shared bus using calibration codes to align data transmission and reception timing, reducing duty-cycle distortion and other timing challenges, allowing for efficient time division multiplexing with a single unit-interval turnaround, thereby minimizing conflicts and maximizing data transmission without increasing turn-around intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple devices transmit data simultaneously on a shared bus, then data transmission efficiency increases, but signal conflicts and data loss increase
Solution Approach 1:
The patent segments the shared bus into multiple time slots using time-division multiplexing. Each device is assigned a specific time slot for transmission, preventing simultaneous transmissions and signal conflicts. This segmentation of time resources allows multiple devices to share the bus efficiently without interfering with each other.
Solution Approach 2:
The patent implements periodic time slots for each device to transmit data. Devices transmit in a repeating cyclic pattern where each device gets a designated period. This periodic allocation ensures that only one device transmits at a time while maintaining systematic access for all devices, resolving the conflict between transmission efficiency and signal integrity.
2Reliability
If turn-around interval between device communications is increased, then data transmission conflicts are reduced, but the amount of data that can be transmitted decreases
Solution Approach 1:
The patent segments the communication cycle into precise time slots for each device with minimal idle time. By efficiently partitioning the time resource and eliminating unnecessary turn-around intervals while maintaining proper timing separation, the system maximizes data transmission volume without increasing conflicts.
Solution Approach 2:
The patent adjusts timing parameters including clock frequency, duty cycle, and time slot durations to optimize the balance between conflict avoidance and data transmission volume. By fine-tuning these parameters, the system achieves reliable transmission with minimal turn-around time, resolving the contradiction between conflict reduction and transmission productivity.
3Reliability
If separate busses are used for each device, then transmission conflicts are eliminated, but circuit board space and device complexity increase
Solution Approach 1:
The patent merges multiple separate communication channels into a single shared bus by implementing time-division multiplexing. Instead of providing dedicated busses for each device, the system combines all device communications onto one physical bus, allocating time slots to prevent conflicts. This merging approach maintains reliable transmission while significantly reducing circuit board space and overall system complexity.
Solution Approach 2:
The patent creates a universal shared bus that serves multiple devices simultaneously through time-division multiplexing. The single bus performs the function of multiple dedicated busses by sequentially serving different devices in time slots. This multi-functional approach eliminates the need for separate busses for each device, reducing hardware complexity while maintaining conflict-free transmission.
Data Source
AI summary
Calibration of devices communicating on a shared data bus may improve data integrity on the shared data bus by reducing duty cycle distortion. Duty cycle distortion may be reduced by adjusting timing of a transceiver in a device for communicating on the shared data bus using calibration codes. The calibration codes may be loaded into memory and used to reconfigure the transceiver timing on the shared data bus with reconfiguration occurring within one or more unit-intervals of time. The calibration code may be used, for example, to adjust a PMOS or NMOS trim circuit at the transceiver.