Bus Wiring Design Data Management via Tree Structure Nodes
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Solution Overview
Problem
In single-layer bus wiring, it is challenging to manage and adjust design data effectively when changing bus wiring conditions, as skilled designers struggle to determine whether to change unsatisfied conditions or rearrange affecting wirings, leading to difficulties in obtaining design data at arbitrary stages.
Innovation Solution
An information processing apparatus that generates nodes when bus wiring conditions are changed or when a wiring result is generated, associating these conditions and design data with the nodes and storing them in a storage unit, allowing for the search and output of matching design data based on designated conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If bus wiring is performed in a single layer, then wiring complexity is reduced, but line length difference between signals increases making it difficult to comply with equal length conditions
Solution Approach 1:
The patent introduces a temporal dimension by creating a tree structure where different wiring conditions are organized as separate nodes. This allows the system to maintain single-layer wiring simplicity while providing access to multiple wiring configurations (including multi-layer options) through the tree structure, effectively resolving the contradiction between wiring complexity and line length equality.
Solution Approach 2:
The patent segments the wiring design space by dividing it into discrete nodes representing different wiring conditions. Each node contains specific wiring parameters and results, allowing designers to selectively access configurations that meet equal length requirements without being constrained to a single wiring approach.
2Adaptability or versatility
If bus wiring conditions are changed during design, then design flexibility is improved, but managing and retrieving design data at arbitrary stages becomes difficult
Solution Approach 1:
The patent performs preliminary organization of design data by automatically generating a tree structure that preserves all wiring condition variations and their corresponding results. This preliminary action ensures that when designers need to retrieve specific design data at arbitrary stages, the information is already structured and accessible, preventing loss of information while maintaining design flexibility.
Solution Approach 2:
The patent creates copies of design data at each node in the tree structure, where each node stores wiring conditions and results as separate entities. This copying mechanism allows multiple versions of design data to coexist without interference, enabling flexible condition changes while ensuring that any previous version can be retrieved through the tree structure.
3Manufacturing precision
If multiple wiring conditions are tested, then design optimization is improved, but time required to manage and adjust conditions increases
Solution Approach 1:
The patent implements a feedback mechanism where wiring results are automatically stored and associated with their corresponding conditions in the tree structure. When designers query the system with specific conditions, the pre-stored results provide immediate feedback, eliminating the need to manually re-test or adjust conditions and significantly reducing the time required for design optimization.
Solution Approach 2:
The system performs preliminary testing and storage of wiring results for multiple conditions by automatically generating the tree structure during the design process. This preliminary action captures optimization data before designers need to make adjustments, allowing them to quickly retrieve and compare results without spending additional time on manual condition adjustment and re-testing.
Data Source
AI summary
An information processing apparatus includes a processor that generates a first node when a bus wiring condition is changed from a first condition to a second condition or when a result of bus wiring is generated based on the first condition. The processor stores the first condition and design data of bus wiring after the change in a storage unit in association with the first node when the bus wiring condition is changed. The processor stores the result of bus wiring, and the design data of bus wiring after the generation in the storage unit in association with the first node when the result of bus wiring is generated, the first condition. The processor searches, upon receiving a designation of a bus wiring condition, for a second node that matches the designated bus wiring condition. The processor outputs design data of bus wiring corresponding to the second node.