Butted Contact Dielectric Stack for Short-Free Dense Interconnects
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Solution Overview
Problem
As semiconductor feature sizes decrease, existing methods for fabricating butted contacts and interconnect features struggle to maintain sufficient separation to avoid electrical shorting, complicating the manufacturing of complex ICs and impacting device performance.
Innovation Solution
A method is introduced that involves forming a dielectric layer over a conductive layer in the butted contact, allowing an interconnect structure to be formed in close proximity, reducing the overall device dimension and increasing feature density by using a dielectric layer to prevent shorting between the interconnect and butted contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lengthened separation distance is used between butted contacts and interconnect features, then electrical shorting is prevented and device performance is improved, but device dimensions increase and feature density decreases
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the conductive layer of the butted contact and the interconnect structure. This dielectric layer acts as a mediator that provides electrical isolation, preventing shorting while allowing the interconnect to be positioned in close proximity to the butted contact, thereby maintaining compact device dimensions.
Solution Approach 2:
The contact structure is segmented into distinct functional layers: a conductive layer for electrical connection and a dielectric layer for electrical isolation. This segmentation allows the conductive and insulating functions to be separated in the vertical dimension, enabling close lateral spacing between interconnect features while maintaining electrical isolation through the layered structure.
2Reliability
If lengthened separation distance is used between butted contacts and interconnect features, then electrical shorting is prevented and device performance is improved, but feature density decreases
Solution Approach 1:
The electrical isolation function is moved from the lateral dimension to the vertical dimension through the introduction of a dielectric layer. This dimensional transition allows interconnect features to be positioned closer together in the lateral plane, increasing feature density, while the dielectric layer provides the necessary electrical isolation in the vertical stacking direction.
3Ease of manufacture
If conventional fabrication methods are used for butted contacts, then manufacturing process is simpler, but sufficient separation cannot be maintained at smaller length scales
Solution Approach 1:
The dielectric layer is formed over the conductive layer before the interconnect structure is fabricated. This preliminary action establishes the electrical isolation framework in advance, allowing subsequent interconnect formation to proceed with standard fabrication techniques while ensuring that adequate separation is already in place, thus maintaining both manufacturing simplicity and precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the reduction of device dimensions, enhances feature density, and improves performance by lowering parasitic capacitance and resistance, potentially increasing device speed by up to 10%.
Implementation Method 1
using a dielectric layer to prevent shorting between the interconnect and butted contacts
Data Source
AI summary
A method of forming a semiconductor structure includes first forming a metal gate (MG) over a semiconductor layer, a gate spacer on a sidewall of the MG, and a source/drain (S/D) feature disposed in the semiconductor layer and adjacent to the MG, forming an S/D contact (MD) over the S/D feature, forming a first ILD layer over the MG and the MD, and subsequently patterning the first ILD layer to form an opening. The method further includes forming a metal layer in the opening, such that the metal layer contacts both the MG and the MD, removing a top portion of the metal layer to form a trench, filling the trench with a dielectric layer, and subsequently forming a second ILD layer over the dielectric layer.