Butterfly Shuffler Packing for Parallel Sparse Bit Streams

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Solution Overview

Problem

Current multichannel data compression and decompression algorithms are serial processes that handle only one data bit stream at a time, inefficiently handling parallel data storage and retrieval in neural inference accelerator hardware, which results in high power consumption and storage inefficiencies due to many zeros in the data.

Innovation Solution

A multichannel data packer and unpacker system utilizing a butterfly shuffler with 2-to-1 multiplexers arranged in a specific configuration to permute and pack/unpack multiple bit streams into equal-length channels, allowing for parallel processing and random access to compressed data, effectively removing zeros and optimizing storage and retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If serial compression algorithms are used to handle one data bit stream at a time, then the compression process is simple to implement, but the processing speed and throughput are limited

Engineering Contradiction:
Improvedata processing throughputVSAvoidcompression system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the multichannel data stream into multiple segments (channels) and processes them simultaneously through parallel compression circuits. Each channel is compressed independently using the same compression algorithm, enabling throughput proportional to the number of channels while keeping individual circuit complexity manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines multiple serial compression operations into a single parallel processing stage by merging the compression circuits for different channels. This consolidation achieves high throughput by processing all channels simultaneously rather than sequentially, while the modular design keeps the overall system complexity controlled.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If parallel compression of multiple bit streams is implemented, then the data processing throughput increases, but the hardware complexity and power consumption increase

Engineering Contradiction:
Improveparallel data processing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies compression only to channels that contain non-zero data, rather than uniformly processing all channels. By detecting the presence of non-zero values and selectively applying compression resources, the system achieves parallel processing throughput while reducing power consumption on channels where compression is unnecessary.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements partial parallel processing by activating compression circuits for only the necessary number of channels based on actual data content. When some channels contain all zeros, their compression is skipped or minimized, reducing overall power consumption while maintaining parallel processing capability for active channels.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If compression is applied to remove zeros from data streams, then the storage requirements and power consumption are reduced, but the complexity of handling variable-length bit streams increases

Engineering Contradiction:
Improvestorage memory requirementsVSAvoidvariable-length stream handling complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent performs preliminary padding of compressed bit streams to equalize their lengths before storage or further processing. By pre-adjusting all channel outputs to the same length (the maximum among all channels), the system eliminates the complexity of handling variable-length streams later, while still achieving storage savings from zero removal.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the length parameter of compressed bit streams by adding padding bits to shorter streams. This parameter adjustment transforms variable-length outputs into uniform-length streams, simplifying subsequent storage and processing operations while preserving the compression benefits of zero removal.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If all channels are padded to equal length, then the storage alignment and retrieval efficiency improve, but the compression ratio is reduced due to added padding bits

Engineering Contradiction:
Improvestorage retrieval efficiencyVSAvoidactual data storage efficiency
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies partial padding only when necessary to align channels for efficient storage and retrieval. By padding only the minimum required amount to achieve alignment rather than excessively padding all channels, the system balances retrieval efficiency with actual data storage efficiency, minimizing the impact on compression ratio.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11671111B2Hardware channel-parallel data compression/decompression
Publication Date: 2023.06.06 SAMSUNG ELECTRONICS CO LTD
  • US11671111B2 patent drawing
  • US11671111B2 patent drawing
  • US11671111B2 patent drawing

AI summary

A multichannel data packer includes a plurality of two-input multiplexers and a controller. The plurality of two-input multiplexers is arranged in 2N rows and N columns in which N is an integer greater than 1. Each input of a multiplexer in a first column receives a respective bit stream of 2N channels of bit streams. Each respective bit stream includes a bit-stream length based on data in the bit stream. The multiplexers in a last column output 2N channels of packed bit streams each having a same bit-stream length. The controller controls the plurality of multiplexers so that the multiplexers in the last column output the 2N channels of bit streams that each has the same bit-stream length.