Bypass Data Line Layout for Narrow-Bezel Display Uniformity
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Solution Overview
Problem
Display apparatuses face challenges in reducing the visible 'stain' effect of signal lines in non-display regions, particularly around rounded corners, which affects the aesthetic appeal and perceived quality of bezel-less or infinity displays.
Innovation Solution
Incorporating a bypass data line and a dummy pattern on the same layer, with a constant voltage applied to the dummy pattern, to minimize the visibility of the signal line 'stain' by forming a mesh structure and overlapping the dummy pattern with the data lines, thereby reducing the width of the non-display region and eliminating the need for separate planarization processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If data lines are extended to the peripheral region to reduce the non-display region width, then the peripheral region width is reduced, but the data lines become visible as stains affecting display quality
Solution Approach 1:
The patent creates a dummy pattern that copies the shape and structure of the bypass data line. This dummy pattern is disposed on the same layer as the bypass data line and spaced apart from it. By replicating the visual characteristics of the data line structure, the dummy pattern creates a uniform appearance that masks the visibility of the actual data lines, thereby reducing the stain effect while maintaining the reduced peripheral region design
Solution Approach 2:
The patent achieves visual homogeneity by disposing the dummy pattern on the same layer as the bypass data line and applying a constant voltage to it. This creates a uniform electrical and visual appearance across the region, making the data lines and dummy patterns indistinguishable to the human eye. The homogeneous structure eliminates the harmful visual effect of visible data lines while maintaining the compact peripheral region
2Area of stationary object
If a bypass data line is added to reduce the peripheral region, then the peripheral region is reduced, but the device complexity increases
Solution Approach 1:
The patent merges the dummy pattern with the bypass data line structure by disposing them on the same layer. This integration allows both elements to share the same fabrication process and structural framework, reducing the overall device complexity despite adding functional elements. The merged structure eliminates the need for separate processing steps for the dummy pattern, thereby mitigating the increase in device complexity while achieving the goal of reducing the peripheral region
3Object-generated harmful factors
If multiple layers and via insulating layers are added to implement the bypass data line structure, then the stain visibility is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent applies a constant voltage to the dummy pattern during the fabrication process, establishing the electrical potential before subsequent layers are deposited. This preliminary action ensures that the dummy pattern is electrically active and visually indistinguishable from the data lines from the outset, preventing stain visibility issues before they can manifest. By pre-establishing the electrical conditions, the need for complex post-fabrication adjustments is eliminated, thereby reducing manufacturing complexity while achieving the goal of reducing stain visibility
Data Source
AI summary
A display apparatus includes a base substrate including a display region and a peripheral region that is a non-display region surrounding the display region, a plurality of data lines disposed in the display region on the base substrate and extending to the peripheral region, a bypass data line disposed in the display region and the peripheral region on the base substrate and electrically connected to at least one of the data lines, and a dummy pattern spaced apart from the bypass data line and disposed on a same layer as the bypass data line.