Bypassing Link Training in IC Testing via E-LTSSM

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Solution Overview

Problem

High-volume manufacturing of integrated circuits involves costly and time-consuming testing protocols due to redundant training processes, which increase the time and cost of verifying the operational integrity of these circuits.

Innovation Solution

The implementation of an enhanced Link Training and Status State Machine (E-LTSSM) in a testing device that bypasses the training process for 99% of test patterns, allowing for direct communication and testing, thereby reducing redundancy and enhancing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a standard training process is executed for each test pattern connection, then the integrated circuit undergoes complete protocol initialization and verification, but the testing time and cost increase significantly due to redundancy

Engineering Contradiction:
Improveoperational integrity verificationVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs link training once during initial connection, then stores the trained state. Subsequent test patterns utilize this pre-established link without repeating the training process, thereby performing the necessary initialization action in advance and reusing it for multiple testing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and separates the essential testing function from the redundant training process. By isolating the link training step as a one-time preliminary action, the system can perform multiple test patterns without repeatedly executing the full training sequence, thus removing unnecessary repetition while preserving essential verification.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a standard training process is executed for each test pattern connection, then complete protocol verification is achieved, but the testing cost increases due to extended test duration

Engineering Contradiction:
Improveoperational integrity verificationVSAvoidtesting cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The system performs link training once during initial connection, then stores the trained state. Subsequent test patterns utilize this pre-established link without repeating the training process, thereby performing the necessary initialization action in advance and reusing it for multiple testing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and separates the essential testing function from the redundant training process. By isolating the link training step as a one-time preliminary action, the system can perform multiple test patterns without repeatedly executing the full training sequence, thus removing unnecessary repetition while preserving essential verification.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If the training process is bypassed for all test patterns, then testing speed increases significantly, but the connection verification reliability may be compromised

Engineering Contradiction:
Improvetesting throughputVSAvoidconnection verification
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs link training once during initial connection, then stores the trained state. Subsequent test patterns utilize this pre-established link without repeating the training process, thereby performing the necessary initialization action in advance and reusing it for multiple testing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system includes a connection confirmation step that verifies the integrated circuit is properly connected before bypassing the training process. This feedback mechanism ensures that the link is genuinely established and functional, maintaining reliability while enabling speed optimization for subsequent tests.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10788533B2Systems and methods for bypass testing
Publication Date: 2020.09.29 INTEL CORP
  • US10788533B2 patent drawing
  • US10788533B2 patent drawing
  • US10788533B2 patent drawing

AI summary

Technology for bypass testing of an integrated circuit using a testing device. The testing device comprising a port configured to connect to an integrated circuit before the integrated circuit is packaged into an end product. The testing device further comprising a controller with architecture configured to bypass a training process designed to be initiated when the integrated circuit is first connected to the port and the port is powered on, confirm a connection between the integrated circuit and the testing device, send a test pattern to the integrated circuit to execute; and receive results from the integrated circuit executing the test pattern.