Bypassing Local Coherency Node for Direct Cache Line Transfer

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Solution Overview

Problem

In data processing systems, accessing cache lines associated with remote memory leads to increased latency and inefficient use of local resources due to the need for cache lines to be passed between local and remote home nodes, causing bottlenecks and resource inefficiencies.

Innovation Solution

Implementing a mechanism where the home agent acts as a local coherency node to bypass the home node for completion data, allowing direct transfer of cache lines from the transfer agent to the requesting node, thereby reducing latency and resource usage by avoiding unnecessary routing through the local coherency node.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cache lines are passed between local and remote home nodes for data access, then data coherence is maintained, but latency increases and local resources are used inefficiently

Engineering Contradiction:
Improvedata coherenceVSAvoidaccess latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the completion data routing function from the local home node and directs it separately to the requesting agent. Instead of all data traffic passing through the local home node, completion data is routed directly from the transfer agent to the requesting agent, removing the unnecessary intermediate step and reducing latency while maintaining coherence through the LCN's tracking of coherency states

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The local coherency node (LCN) serves as an intermediary that tracks coherency states of remote cache lines without being the primary routing path for completion data. The LCN monitors coherence requirements and enables the direct routing path, acting as a mediator that ensures coherence is maintained while allowing faster direct transfer of completion data from the transfer agent to the requesting agent

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If cache lines are routed through the local home node, then coherency management is simplified, but resource efficiency decreases due to additional routing hops

Engineering Contradiction:
Improvecoherency management complexityVSAvoidresource efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the data transfer path into two separate functions: the transfer agent handles the actual data transfer and routing to requesting agents, while the local coherency node handles coherency state tracking. This segmentation allows completion data to be routed directly without passing through the local home node, improving resource efficiency while the LCN maintains coherency management through separate state tracking

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The local coherency node performs multiple functions: it tracks coherency states of remote cache lines, receives read requests from requesting agents, and sends control signals to the transfer agent. This multi-functionality allows the system to maintain simplified coherency management through the LCN while enabling direct completion data routing that improves resource efficiency

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If completion data is routed through the local coherency node, then coherency state updates are ensured, but congestion increases on the response channel

Engineering Contradiction:
Improvecoherency state accuracyVSAvoidresponse channel congestion
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the completion data from the main response channel flow that passes through the local coherency node. Instead of all completion data being routed through the LCN, the transfer agent directly routes completion data to the requesting agent, taking it out of the congested response channel path while the LCN still receives necessary coherency update information through a separate control path

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12079132B2Method and apparatus for efficient chip-to-chip data transfer
Publication Date: 2024.09.03 ARM LTD
  • US12079132B2 patent drawing
  • US12079132B2 patent drawing
  • US12079132B2 patent drawing

AI summary

Data transfer between caching domains of a data processing system is achieved by a local coherency node (LCN) of a first caching domain receiving a read request for data associated with a second caching domain, from a requesting node of the first caching domain. The LCN requests the data from the second caching domain via a transfer agent. In response to receiving a cache line containing the data from the second caching domain, the transfer agent sends the cache line to the requesting node, bypassing the LCN and, optionally, sends a read-receipt indicating the state of the cache line to the LCN. The LCN updates a coherency state for the cache line in response to receiving the read-receipt from the transfer agent and a completion acknowledgement from the requesting node. Optionally, the transfer agent may send the cache line via the LCN when congestion is detected in a response channel of the data processing system.