Bypass MOS Circuit for Fast Low-Voltage Output Switching
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in quickly generating output voltages at desired levels due to high impedance in bypass paths, which slows down voltage changes and increases circuit size, especially under low voltage conditions.
Innovation Solution
A semiconductor integrated circuit design that includes a bypass circuit with strategically placed MOS transistors to form a bypass path with low impedance under low voltage conditions, allowing for rapid voltage changes and output signal generation without applying voltages higher than the transistors' withstand levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MOS transistors with thick gate oxide film are used to withstand high voltage (3.3V), then voltage withstand capability is improved, but operating speed decreases and circuit size increases
Solution Approach 1:
The circuit dynamically switches between two different bypass path configurations based on voltage conditions. Under high voltage conditions, a first bypass path is formed using transistors with specific gate voltages. Under low voltage conditions, a second bypass path is formed using different transistors. This dynamic reconfiguration allows the circuit to optimize performance for each voltage regime, achieving fast switching speeds when needed while maintaining safety under high voltage conditions.
Solution Approach 2:
The circuit changes the electrical parameters (gate voltages, transistor conduction states) of the bypass paths based on the detected voltage condition. By adjusting which transistors are conductive and what gate voltages are applied, the circuit transforms its characteristics to match the operating conditions, thereby improving operating speed under low voltage without compromising voltage withstand capability under high voltage conditions.
2Reliability
If MOS transistors with thick gate oxide film are used to withstand high voltage (3.3V), then voltage withstand capability is improved, but circuit size increases
Solution Approach 1:
The circuit dynamically switches between two different bypass path configurations based on voltage conditions. Under high voltage conditions, a first bypass path is formed using transistors with specific gate voltages. Under low voltage conditions, a second bypass path is formed using different transistors. This dynamic reconfiguration allows the circuit to optimize performance for each voltage regime, achieving fast switching speeds when needed while maintaining safety under high voltage conditions.
Solution Approach 2:
The circuit changes the electrical parameters (gate voltages, transistor conduction states) of the bypass paths based on the detected voltage condition. By adjusting which transistors are conductive and what gate voltages are applied, the circuit transforms its characteristics to match the operating conditions, thereby improving operating speed under low voltage without compromising voltage withstand capability under high voltage conditions.
3Reliability
If three or more MOS transistors are connected in series in a bypass path, then voltage protection is improved, but impedance increases and voltage change speed decreases
Solution Approach 1:
The circuit dynamically switches between two different bypass path configurations based on voltage conditions. Under high voltage conditions, a first bypass path is formed using transistors with specific gate voltages. Under low voltage conditions, a second bypass path is formed using different transistors. This dynamic reconfiguration allows the circuit to optimize performance for each voltage regime, achieving fast switching speeds when needed while maintaining safety under high voltage conditions.
Solution Approach 2:
The circuit changes the electrical parameters (gate voltages, transistor conduction states) of the bypass paths based on the detected voltage condition. By adjusting which transistors are conductive and what gate voltages are applied, the circuit transforms its characteristics to match the operating conditions, thereby improving operating speed under low voltage without compromising voltage withstand capability under high voltage conditions.
Data Source
AI summary
A semiconductor integrated circuit includes a bypass circuit that forms a bypass path under a low voltage condition, and the bypass circuit includes first and second bypass MOS transistors respectively placed between drains of first and second PMOS transistors and a ground voltage terminal, each transistor having a gate to which a second power supply voltage is applied, and third and fourth bypass MOS transistors respectively placed between the first and second bypass MOS transistors and the ground voltage terminal, each transistor controlled to be ON and OFF in accordance with an input signal and a voltage condition.