Bypass Predictor for Exclusive Last-Level Cache

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Solution Overview

Problem

Exclusive last-level caches face challenges in bypassing useless data evictions due to lack of program behavior information and locality information, leading to inefficient allocation and increased power consumption and interconnect bandwidth usage.

Innovation Solution

A cache controller with a bypass predictor that uses reuse indicators and counters to determine the likelihood of data reuse, allowing for selective allocation and bypass of evicted data blocks between caches, thereby optimizing cache performance and reducing thrashing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If cast-out data from upper-level cache is allocated to exclusive last-level cache, then cache capacity is utilized, but interconnect bandwidth and power are wasted on useless data

Engineering Contradiction:
Improvecache performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The system uses the exclusive cache itself to generate reuse information by monitoring whether evicted data is subsequently requested from upper-level caches. This self-generated information enables intelligent bypass decisions without external intervention, allowing the cache to serve its own optimization needs.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent implements a feedback mechanism where the exclusive cache monitors reuse patterns of evicted data and uses this information to dynamically adjust bypass decisions. The reuse information feeds back into the allocation logic, creating a closed-loop system that continuously optimizes based on actual performance data.

Inventive Principle:
Principle #23Feedback

2Productivity

If cast-out data from upper-level cache is allocated to exclusive last-level cache, then cache capacity is utilized, but interconnect bandwidth is consumed

Engineering Contradiction:
Improvecache performanceVSAvoidinterconnect bandwidth usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The exclusive cache autonomously generates reuse information by monitoring access patterns, enabling it to self-determine which data blocks warrant allocation and which should be bypassed, eliminating the need for external control signals.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

A feedback loop monitors whether evicted data is reused and feeds this information back to the allocation logic, enabling dynamic adjustment of bypass decisions based on actual reuse patterns observed during system operation.

Inventive Principle:
Principle #23Feedback

3Productivity

If reuse information is tracked in exclusive cache, then bypass decisions are improved, but cache complexity increases

Engineering Contradiction:
Improvebypass decision accuracyVSAvoidcache controller complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The exclusive cache controller autonomously generates and maintains reuse information by monitoring its own access patterns, eliminating the need for external tracking mechanisms or complex coordination with upper-level caches.

Inventive Principle:
Principle #25Self-service

4Reliability

If LRU+1 or MRU position is used for data insertion, then reuse avoidance is improved, but cache thrashing increases for streaming workloads

Engineering Contradiction:
Improvereuse avoidanceVSAvoidcache stability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent dynamically adjusts the insertion position in the LRU stack based on reuse information, transitioning from static LRU+1/MRU positions to adaptive positioning that responds to actual reuse patterns, thereby preventing thrashing for streaming workloads while maintaining reuse avoidance for temporal data.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the insertion position parameter in the LRU stack based on reuse information, allowing flexible adjustment between different insertion strategies (LRU+1, MRU, or other positions) to optimize for different workload characteristics.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11609858B2Bypass predictor for an exclusive last-level cache
Publication Date: 2023.03.21 SAMSUNG ELECTRONICS CO LTD
  • US11609858B2 patent drawing
  • US11609858B2 patent drawing
  • US11609858B2 patent drawing

AI summary

A system and a method to allocate data to a first cache increments a first counter if a reuse indicator for the data indicates that the data is likely to be reused and decremented the counter if the reuse indicator for the data indicates that the data is likely not to be reused. A second counter is incremented upon eviction of the data from the second cache, which is a higher level cache than the first cache. The data is allocated to the first cache if the value of the first counter is equal to or greater than the first predetermined threshold or the value of the second counter equals zero, and the data is bypassed from the first cache if the value of the first counter is less than the first predetermined threshold and the value of the second counter is not equal to zero.