Bypassable Serialization Adapter for NoC Hard Error Resilience
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Solution Overview
Problem
Conventional semiconductor chips fail to operate correctly when faced with hard errors, which are not adequately addressed by existing error correction codes, particularly in network-on-chip (NoC) components prone to such errors due to their long wire lengths and high wire-to-logic ratio.
Innovation Solution
The implementation of bypassable and detour-based serialization adapters in NoC links, which identify and bypass or detour around error-prone sections, allowing the chip to function with reduced throughput or no throughput decrease, using software procedures, automatic physical link self-checking, and data transport functional checking to locate hard errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional chips operate without error correction, then device complexity is low, but reliability deteriorates when hard errors occur
Solution Approach 1:
The patent introduces serialization adapters as intermediary components between NoC links of different widths. These adapters detect hard errors in the link and dynamically switch between parallel and serialized transmission modes, acting as a mediator that protects data integrity without requiring complex end-to-end error correction codes.
Solution Approach 2:
The serialization adapter dynamically adjusts its operation mode based on detected link health. When no errors are detected, it operates in bypass mode for maximum throughput. When hard errors are detected, it dynamically switches to serialization mode to maintain reliable communication, providing adaptive fault tolerance.
2Reliability
If serialization adapters are added to bypass hard errors, then reliability improves, but device complexity increases
Solution Approach 1:
The patent segments the NoC link into multiple serial channels within the serialization adapter. By dividing the parallel transmission into sequential serial transmissions, the adapter can detect and handle errors in individual bits without affecting the entire link, reducing the complexity of error correction while maintaining reliability.
Solution Approach 2:
The serialization adapter performs self-diagnosis by monitoring transmission errors and automatically switching between parallel and serialized modes. The system serves itself by detecting hard errors and reconfiguring the transmission mode without external intervention, reducing the need for complex external error correction mechanisms.
3Productivity
If parallel transmission is used on wide links, then data throughput is high, but susceptibility to hard errors increases
Solution Approach 1:
The serialization adapter dynamically switches between parallel transmission mode (for high throughput when links are healthy) and serialized transmission mode (for reliability when hard errors are detected). This dynamic adaptation allows the system to optimize for throughput when possible and switch to error-resistant mode when necessary.
Solution Approach 2:
The system changes the transmission parameter from parallel to serial based on detected link conditions. By altering the transmission mode parameter, the system can maintain high throughput under normal conditions while providing protection against hard errors when needed, resolving the contradiction between throughput and reliability.
4Reliability
If serialization is applied to all links, then hard error protection is maximized, but data throughput decreases
Solution Approach 1:
Rather than applying serialization to all links statically, the patent implements dynamic mode switching in serialization adapters. Links operate in high-speed parallel mode by default and only switch to serialized mode when hard errors are detected, providing protection when needed while maintaining maximum throughput during normal operation.
Solution Approach 2:
The system changes the transmission parameter dynamically based on link health rather than applying a fixed serialization mode to all links. This parameter change approach allows the system to achieve hard error protection when necessary while maintaining high data throughput during normal operation, resolving the contradiction between protection and performance.
Data Source
AI summary
A Network-on-Chip (NoC) link with an upstream bypassable narrowing serialization adapter and a downstream bypassable widening serialization adapter. The serialization adapters are normally bypassed. To avoid sending information on broken wires, bypassing is disabled so that information is serialized to only a portion of the link. Serialization can be applied to any portion of a link down to as little as one bit wire.